SLLA565 September   2021 TUSB1044

 

  1.   Trademarks
  2. 1Introduction
  3. 2TUSB1044 Configuration and Control Implementation
    1. 2.1 TUSB1044 Four-Level Pins
      1. 2.1.1 I2C_EN
      2. 2.1.2 VIO_SEL
      3. 2.1.3 UEQ[1:0] and DEQ[1:0]
      4. 2.1.4 CFG[1:0]
    2. 2.2 TUSB1044 Two-Level Pins
      1. 2.2.1 FLIP, CTL0, and CTL1
      2. 2.2.2 DIR0 and DIR1
      3. 2.2.3 SWAP
      4. 2.2.4 HPDIN
      5. 2.2.5 SLP_S0#
  4. 3TUSB1044 I2C Mode Implementation
    1. 3.1 TUSB1044 Operating Mode Configuration, General_1 Register, 0x0A
    2. 3.2 VOD Configuration, General_3 Register 0x0C
    3. 3.3 Upstream and Downstream Equalization Configuration Registers, UFP1_EQ, UFP2_EQ, DFP1_EQ, and DFP2_EQ Registers 0x10, 0x11, 0x20, 0x21
  5. 4Benefits of Using the I2C Mode Control
  6. 5TUSB1044 Host Implementation Example
  7. 6TPS6598X, TPS6599X Based I2C Control and Tuning
    1. 6.1 Enable PD Controller I2C Control of External Slaves
    2. 6.2 Example of I2C Configuration Upon PD Controller PoR Event and Detach Event
    3. 6.3 Example of I2C Configuration Upon Cable-Orientation Event and DP Configuration Event
    4. 6.4 Notes for Application
  8. 7References

2.2.5 SLP_S0#

The SLP_S0# enables and disables RX Detect functionality in USB mode.

While SLP_S0# is low and TUSB1044 is in U2 and U3 mode, TUSB1044 disables LOS and LFPS detection circuitry and RX termination for both channels remains enabled. This allows even lower TUSB1044 power consumption while in the U2 and U3 mode. Once SLP_S0# is asserted high, the TUSB1044 will again start performing far-end receiver detection as well as monitor LFPS so it can determine when to exit the U2 and U3 mode.

When SLP_S0# is asserted low and the TUSB1044 is in disconnect mode, the TUSB1044 remains in Disconnect mode and never performs far-end receiver detection. This allows even lower TUSB1044 power consumption while in the Disconnect mode. Once SLP_S0# is asserted high, the TUSB1044 again starts performing far-end receiver detection so it can determine when to exit the Disconnect mode.

SLP_S0# is typically connected to PCH. If not used, pull SLP_S0# high through a 1-kΩ resistor.