SLLA565 September 2021 TUSB1044
Register 0x0A is the control interface switching the TUSB1044 USB, DP operation mode using bit [2:0]. Table 3-3 lists the bit definitions of register 0x0A. Bit [4] allows the EQ setting to be configured through I2C, overrides the default pin configuration.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | RESERVED | R | 0h |
Reserved |
6 | RESERVED | R/W | 0h |
Reserved |
5 | SWAP_SEL | R/W | 0h |
Setting this field performs a global direction swap on all the channels. 0h = Channel directions and EQ settings are in normal mode 1h = Reverse all channel directions and EQ settings for the input ports. |
4 | EQ_OVERRIDE | R/W | 0h |
Setting this field will allow software to use EQ settings from registers instead of value sampled from pins. 0h = EQ settings based on sampled state of EQ pins. 1h = EQ settings based on programmed value of each of the EQ registers. |
3 | HPDIN_OVERRIDE | R/W | 0h |
Overrides HPDIN pin state. 0h = HPD_IN based on HPD_IN pin. 1h = HPD_IN high. |
2 | FLIP_SEL | R/W | 0h |
FLIPSEL 0h = Normal Orientation 1h = Flip orientation. |
1-0 | CTLSEL[1:0] | R/W | 1h |
Controls the DP and USB modes. 0h = Disabled. All RX and TX for USB3 and DisplayPort are disabled. 1h = USB3.1 only enabled. 2h = Four Lanes of DisplayPort enabled. 3h = USB3.1 and Two DisplayPort Lanes. |