This application note provides an overview of the common bring-up cases of the TLIN1431-Q1 LIN SBC with integrated high-side switch and watchdog. This device can be operated using either of two control modes, determined upon device power-up: pin control or SPI control. In pin control, the device’s pins are configured such that the watchdog and state changes of the TLIN1431-Q1 are controlled using logic inputs to the pins. In this control mode, the device is not configurable through SPI. Conversely, in SPI control, the device’s pins are configured differently, four of which behave as CLK, SDO, SDI, and nCS, thereby allowing SPI programming for the device. The device operates with a different state diagram between the two control modes, including different triggers for state changes, different state conditions, and different programmability. This report will provide an overview of a general method of powering up the TLIN1431-Q1 into either of these two control modes.
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The operational control mode of the TLIN1431-Q1 is determined during startup based on the configuration of pin 7 of the device, the PIN/nCS pin. Once the device starts up into either pin control or SPI control, it cannot switch to the other control mode without a power-on reset. Thus, start-up is the most important consideration in determining how the TLIN1431-Q1 behaves.
When the PIN/nCS pin is pulled to GND as shown in Figure 1-1, the device starts up in pin control. See Section 2 for configuration in pin control.
When left floating or when pulled to VCC as shown in Figure 1-2, the device operates in SPI control. See Section 3 for a configuration in SPI control, and see Section 1.1 regarding operational voltage selection for the TLIN14315-Q1 (5 V version of the device), which operates without the need for a VIO pin to determine logic-level voltages.
The TLIN14313-Q1 (the 3.3 V LDO version of the device) operates using logic level signals of 3.3 V in both pin control and SPI control.
The TLIN14315-Q1 (the 5 V LDO version of the device), is capable of multiple operational voltages without the need for a VIO pin (also known as VIOless operation). In SPI control, the connection of the PIN/nCS pin determines whether the device operates using 3.3 V or 5 V SPI communication. As shown in Figure 1-2, leaving the PIN/nCS pin floating causes the device to operate with 3.3 V SPI, while a pull-up to VCC (5 V) results in 5 V SPI operation from the TLIN14315-Q1.
The WKRQ/INH pin can be either a logic-level digital output for wake (WKRQ) or a high-voltage inhibit output (INH) based upon its connection at startup. When externally pulled down by a 100 kΩ resistor, the pin is WKRQ and operates based upon VCC. When left floating or pulled down by a resistor of 1 MΩ or larger, the pin becomes a high-voltage INH output pin. Figure 1-3 shows these two configurations.
It is important for the designer to recognize the behavior and limits of a microprocessor connected to the TLIN1431-Q1 to ensure that necessary design constraints are met. The microprocessor should be able to handle the 5 V I/O signals of the TLIN14315-Q1 if the PIN/nCS pin is pulled up to 5 V, and the WKRQ/INH pin should be properly connected based upon its configuration as either a digital WKRQ signal or a high-voltage INH signal.