SLLA598 October   2022 TDP1204 , TMDS1204

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2HDMI2.1 Key Features
    1. 2.1 Bandwidth
    2. 2.2 Dynamic HDR
    3. 2.3 Auto Low-Latency Mode
    4. 2.4 Variable Refresh Rate
    5. 2.5 Quick Frame Transport
    6. 2.6 Quick Media Switching
    7. 2.7 Enhanced Audio Return Channel
  5. 3TDP1204 and TMDS1204
    1. 3.1 TMDS1204 Fan-Out Buffer
    2. 3.2 TMDS 1204 SIGDET_OUT
    3. 3.3 TMDS1204 DC Gain Adjustment
    4. 3.4 TDP1204 DDC Buffer
  6. 4Summary
  7. 5References

3.1 TMDS1204 Fan-Out Buffer

In some applications a HDMI sink requires the clock and data must be on separate paths. The TMDS1204 implements a fan-out buffer feature to support such applications. When the fan-out buffer feature is enabled, the TMDS1204 will output the HDMI clock on RCLKOUTp/n when operating in HDMI 1.4 or HDMI 2.0. The OUT_CLKp/n will be disabled. When operating in HDMI 2.1 FRL mode, the TMDS1204 will output FRL data lane 3 on OUT_CLKp/n. RCLKOUTp/n will be disabled.