3 Transmitter Configuration

AC_EN: In pin-strap mode, the AC pin selects between AC-coupled or DC-coupled transmitter

TXPRE: The TMDS1204 provides pre-emphasis/de-emphasis on the data lanes allowing the output signal pre-conditioning to offset interconnect losses between the TMDS1204 outputs and a TMDS/FRL receiver. De-emphasis is not implemented on the clock lane unless the TMDS1204 is in HDMI 2.1 FRL mode and at which time the clock lane becomes a data lane. Pre-emphasis is not implemented in HDMI 2.1 FRL mode. There are two methods to implement pre-emphasis, pin strapping or through I2C programming. TX pre-emphasis and de-emphasis control is only supported in limited mode.

The transmitter pre-emphasis and de-emphasis control is only supported in limited mode for HDMI 1.4 or HDMI 2.0. When the TDP1204 is operating as an HDMI 2.1 redriver pre-emphasis implementation is not available and only the de-emphasis is modified by the device based upon the DDC TXFFE snooped value. Therefore, when using pin-strap mode, the TXPRE pin controls four different global pre-emphasis/de-emphasis values for all data lanes when TMDS1204 is operating in limited mode for HDMI 1.4 or HDMI 2.0. However, in HDMI 2.1 FRL mode, the TXPRE pin has no effect.

TXSWG: The TMDS1204 transmitter swing level can be adjusted in both pin-strap and I2C mode.

In I2C mode, TX swing settings are controlled independently for each lane through the registers of the device. In pin strap mode, with limited mode enabled, the TXSWG pin adjusts the default 1000 mV swing. However, when linear mode is enabled, the linearity range is fixed at the highest level (1200mVpp) so TXSWG pin is not used.

In HDMI 1.4, the TXSWG controls the swing for both the data and clock lanes. In HDMI 2.0, the TXSWG pin controls the data lanes only and the clock lane remains at the default value. In HDMI 2.1, the TXSWG pin controls data and clock lanes.