SLLA643 August 2024 MCF8315C , MCF8315C-Q1 , MCF8316C-Q1
SDA, SCL are digital input (SDA has dual function of output also) pins with IO structure as shown in Figure 4-6. The input path has a buffer with hysteresis followed by a 50ns glitch filter to suppress noise.
The output path is an open drain that needs an external pull-up resistor to AVDD for I2C communication. The pull-down drive strength (Slew rate) can be configured using SLEW_RATE_I2C_PINS to optimize between timing requirements, EMI and cross talk. Default pull-down drive strength is 4.8mA and this can drive up to 400pF bus capacitance. If system has a lower bus capacitance, a lower pull-down drive strength can be selected. Pull-up resistor depends the I2C clock frequency and bus capacitance [2].
SLEW_RATE_I2C_PINS | Pull-Down Drive Strength (mA) |
---|---|
00b | 4.8 |
01b | 3.9 |
10b | 1.86 |
11b | 30.8 |
When used, these pins need to be directly connected to the external MCU with an external pull-up resistor to AVDD.
When unused, these pins need to be left floating.