SLLS552G December   2002  – September 2022 SN65HVD20 , SN65HVD21 , SN65HVD22 , SN65HVD23 , SN65HVD24

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Driver Electrical Characteristics
    6. 8.6  Receiver Electrical Characteristics
    7. 8.7  Driver Switching Characteristics
    8. 8.8  Receiver Switching Characteristics
    9. 8.9  Receiver Equalization Characteristics
    10. 8.10 Power Dissipation
    11. 8.11 Typical Characteristics
  9. Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
    4. 10.4 Device Functional Modes
      1. 10.4.1 Test Mode Driver Disable
      2. 10.4.2 Equivalent Input and Output Schematic Diagrams
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Noise Considerations for Equalized Receivers
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 Support Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Typical Characteristics

GUID-4BA62625-CA55-4AD4-8CCE-6F8C075B56C9-low.gifFigure 8-1 SN65HVD2[0,3] Bus Pin Current vs Bus Pin Voltage
GUID-1117D010-9CFA-4431-AED7-F5D0243EA249-low.gifFigure 8-3 Supply Current vs Signaling Rate
GUID-6A5F88C0-B2E4-4AA1-9E08-AD80C9FF91CA-low.gifFigure 8-5 Receiver Output Voltage vs Differential Input Voltage
GUID-B0D15D0C-6117-4E4B-9DFB-24FE37642631-low.gifFigure 8-7 SN65HVD2[0,1,3,4] Peak-to-Peak Jitter vs Cable Length
GUID-21A1FC5D-B6B8-4C31-A964-E700C318FB56-low.gifFigure 8-2 SN65HVD2[1,2,4] Bus Pin Current vs Bus Pin Voltage
GUID-C9B057B6-1AD9-436D-8DF1-4048D1A5D220-low.gifFigure 8-4 Driver Differential Output Voltage vs Driver Load Current
GUID-F3F42528-FF17-4904-A080-B1BEAE6EEC92-low.gifFigure 8-6 SN65HVD2[0,3] Peak-to-Peak Jitter vs Cable Length
GUID-196CDE3F-1F4E-41A4-84CC-45D7836D95AB-low.gifFigure 8-8 SN65HVD2[1,4] Peak-to-Peak Jitter vs Signaling Rate