SLLS792C June   2007  – December 2024 TRS3221E

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings, IEC Specifications
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Electrical Characteristics
    7. 5.7  Driver Section Electrical Characteristics
    8. 5.8  Driver Section Switching Characteristics
    9. 5.9  Receiver Section Electrical Characteristics
    10. 5.10 Receiver Section Switching Characteristics
    11. 5.11 Auto-Powerdown Section Electrical Characteristics
    12. 5.12 Auto-Powerdown Section Switching Characteristics
    13. 5.13 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power
      2. 7.3.2 RS232 Driver
      3. 7.3.3 RS232 Receiver
      4. 7.3.4 RS232 Status
    4. 7.4 Device Functional Modes
  9. Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Design Requirements
    4. 8.4 Detailed Design Procedure
    5. 8.5 Application Curve
    6.     Power Supply Recommendations
    7. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

ESD Ratings, IEC Specifications

NAMETEST CONDITIONSVALUEUNIT
RIN, DOUT(2)IEC 61000-4-2 Contact Discharge (1)(2)±8000V
IEC 61000-4-2 Air-Gap Discharge (1)(2)±15000
A minimum of 1-µF capacitor is required between VCC and GND to meet the specified IEC ESD level
For optimized IEC ESD performance for DYY package, the recommendation is to have series resistor (≥ 50Ω), on all logic inputs directly connected to power or ground, to minimize the transient currents going into or out of the logic pins.