SLLS918D July   2008  – November 2024 ISO721-Q1 , ISO722-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Recommended Operating Conditions
    3. 6.3  Thermal Information
    4. 6.4  Power Ratings
    5. 6.5  Insulation Specifications
    6. 6.6  Safety-Related Certifications
    7. 6.7  Safety Limiting Values
    8. 6.8  Electrical Characteristics: VCC1 and VCC2 5-V Operation
    9. 6.9  Electrical Characteristics: VCC1 and VCC2 at 3.3-V Operation
    10. 6.10 Electrical Characteristics: VCC1 at 3.3-V, VCC2 at 5-V Operation
    11. 6.11 Electrical Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
    12. 6.12 Switching Characteristics: VCC1 and VCC2 5-V Operation
    13. 6.13 Switching Characteristics: VCC1 and VCC2 at 3.3-V Operation
    14. 6.14 Switching Characteristics: VCC1 at 3.3-V, VCC2 at 5-V Operation
    15. 6.15 Switching Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
    16. 6.16 Typical Characteristics
    17. 6.17 Insulation Characteristics Curves
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
      1. 8.3.1 Device I/O Schematic
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 PCB Material
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.13 Switching Characteristics: VCC1 and VCC2 at 3.3-V Operation

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay, low-to-high-level output See Figure 7-1 20 34 ns
tPHL Propagation delay , high-to-low-level output See Figure 7-1 20 34 ns
tsk(p) Pulse skew |tPHL – tPLH| See Figure 7-1 0.5 3 ns
tsk(pp) (1) Part-to-part skew 0 5 ns
tr Output signal rise time See Figure 7-1 2.3 ns
tf Output signal fall time See Figure 7-1 2.3 ns
tpHZ Sleep-mode propagation delay,
high-level-to-high-impedance output		 ISO722-Q1 See Figure 7-2 7 13 25 ns
tpZH Sleep-mode propagation delay,
high-impedance-to-high-level output		 5 6 15 μs
tpLZ Sleep-mode propagation delay,
low-level-to-high-impedance output		 See Figure 7-3 7 13 25 ns
tpZL Sleep-mode propagation delay,
high-impedance-to-low-level output		 5 6 15 μs
tfs Failsafe output delay time from input power loss See Figure 7-4 3 μs
tjit(PP) Peak-to-peak eye-pattern jitter See Figure 7-6 2 ns
See Figure 7-6 3
(1) tsk(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.