SLLS983L June   2009  – October 2023 ISO1050

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics - DC Specification
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Time-Out (DTO)
        2. 8.3.3.2 Thermal Shutdown
        3. 8.3.3.3 Undervoltage Lockout and Fail-Safe
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 CAN Bus Short-Circuit Current Limiting
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
    1. 10.1 General Recommendations
    2. 10.2 Power Supply Discharging
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

8.4 Device Functional Modes

Table 8-2 Driver Function Table
INPUTOUTPUTSDRIVEN BUS STATE
TXD(1)CANH(1)CANL(1)
LHLDominant
HZZRecessive
(1) H = high level, L = low level, Z = common mode (recessive) bias to VCC / 2. See Figure 8-1 and Figure 8-2 for bus state and common mode bias information.
Table 8-3 Receiver Function Table
DEVICE MODECAN DIFFERENTIAL INPUTS
VID = VCANH – VCANL		BUS STATERXD PIN(1)
Normal or SilentVID ≥ 0.9 VDominantL
0.5 V < VID < 0.9 V??
VID ≤ 0.5 VRecessiveH
Open (VID ≈ 0 V)OpenH
(1) H = high level, L = low level, ? = indeterminate.
Table 8-4 Function Table
DRIVERRECEIVER
INPUTSOUTPUTSBUS STATEDIFFERENTIAL INPUTS VID = CANH–CANLOUTPUT
RXD		BUS STATE
TXDCANHCANL
L(1)HLDOMINANTVID ≥ 0.9 VLDOMINANT
HZZRECESSIVE0.5 V < VID < 0.9 V??
OpenZZRECESSIVEVID ≤ 0.5 VHRECESSIVE
XZZRECESSIVEOpenHRECESSIVE
(1) Logic low pulses to prevent dominant time-out.
GUID-20230425-SS0I-SR6S-56LF-WDD48V9DHJVJ-low.svg Figure 8-4 Equivalent I/O Schematics