SLLSE09J November 2009 – July 2021 TUSB1210
PRODUCTION DATA
Table 7-1, Table 7-2, and Table 7-3 show the status of each of the 12 ULPI pins including input or output direction and whether output pins are driven to ‘0’ or to ‘1’, or pulled up or pulled down through the internal pullup or pulldown resistors.
Note that pullup or pulldown resistors are automatically replaced by driven ‘1’/’0’ levels respectively once internal IORST is released, with the exception of the pullup on STP which is maintained in all modes.
Pin assignment changes in ULPI 3-pin serial mode, ULPI 6-pin serial mode, and UART mode. Unused pins are tied low in these modes as shown below.
ULPI SYNCHRONOUS MODE POWER-UP | |||||||||
---|---|---|---|---|---|---|---|---|---|
UNTIL IORST RELEASE | PLL OFF | PLL ON + STP HIGH | PLL ON + STP LOW | ||||||
PIN NO. | PIN NAME | DIR | PU/PD | DIR | PU/PD | DIR | PU/PD | DIR | PU/PD |
26 | CLOCK | Hiz | PD | I | PD | IO | — | IO | — |
31 | DIR | Hiz | PU | O, (‘1’) | — | O, (‘0’) | — | O | — |
2 | NXT | Hiz | PD | O, (‘0’) | — | O, (‘0’) | — | O | — |
29 | STP | Hiz | PU | I | PU | I | PU | I | PU |
3 | DATA0 | Hiz | PD | O, (‘0’) | — | I | PD | IO | — |
4 | DATA1 | Hiz | PD | O, (‘0’) | — | I | PD | IO | — |
5 | DATA2 | Hiz | PD | O, (‘0’) | — | I | PD | IO | — |
6 | DATA3 | Hiz | PD | O, (‘0’) | — | I | PD | IO | — |
7 | DATA4 | Hiz | PD | O, (‘0’) | — | I | PD | IO | — |
9 | DATA5 | Hiz | PD | O, (‘0’) | — | I | PD | IO | — |
10 | DATA6 | Hiz | PD | O, (‘0’) | — | I | PD | IO | — |
13 | DATA7 | Hiz | PD | O, (‘0’) | — | I | PD | IO | — |
SUSPEND MODE | LINK / EXTERNAL RECOMMENDED SETTING DURING SUSPEND MODE | ||||
---|---|---|---|---|---|
PIN NO. | PIN NAME | DIR | PU/PD | DIR | PU/PD |
26 | CLOCK | I | — | O | — |
31 | DIR | O, (‘1’) | — | I | — |
2 | NXT | O, (‘0’) | — | I | — |
29 | STP | I | PU(1) | O, (‘0’) | — |
3 | DATA0 | O, (LINESTATE0) | — | I | — |
4 | DATA1 | O, (LINESTATE1) | — | I | — |
5 | DATA2 | O, (‘0’) | — | I | — |
6 | DATA3 | O, (INT) | — | I | — |
7 | DATA4 | O, (‘0’) | — | I | — |
9 | DATA5 | O, (‘0’) | — | I | — |
10 | DATA6 | O, (‘0’) | — | I | — |
13 | DATA7 | O, (‘0’) | — | I | — |
ULPI 6-PIN SERIAL MODE | ULPI 3-PIN SERIAL MODE | UART MODE | |||||||
---|---|---|---|---|---|---|---|---|---|
PIN NO. | PIN NAME | DIR | PU/PD | PIN NAME | DIR | PU/PD | PIN NAME | DIR | PU/PD |
26 | CLOCK (1) | IO | — | CLOCK (1) | IO | — | CLOCK (1) | IO | — |
31 | DIR | O | — | DIR | O | — | DIR | O | — |
2 | NXT | O | — | NXT | O | — | NXT | O | — |
29 | STP | I | PU | STP | I | PU | STP | I | PU |
3 | TX_ENABLE | I | — | TX_ENABLE | I | — | TXD | I | — |
4 | TX_DAT | I | — | DAT | IO | — | RXD | IO | — |
5 | TX_SE0 | I | — | SE0 | IO | — | tie low | O | — |
6 | INT | O | — | INT | O | — | INT | O | — |
7 | RX_DP | O | — | tie low | O | — | tie low | O | — |
9 | RX_DM | O | — | tie low | O | — | tie low | O | — |
10 | RX_RCV | O | — | tie low | O | — | tie low | O | — |
13 | tie low | O | — | tie low | O | — | tie low | O | — |