SLLSEH0F July   2013  – August 2014 SN65HVD01

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Dissipation Ratings
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Equivalent Input and Output Schematic Diagrams
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Bus Loading
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Performance Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

DRC 10 PIN
(TOP VIEW)
po_sllseh0.gif

Pin Functions

NAME NO. I/O DESCRIPTION
VL 1 Logic Supply 1.65 V to 3.6 V supply for logic I/O signals R, RE, D, DE, and SLR)
R 2 Digital Output Receive data output
DE 3 Digital Input Driver enable input
RE 4 Digital Input Receiver enable input
D 5 Digital Input Transmission data input
GND 6 Reference Potential Local device ground
SLR 7 Digital Input Slew rate select: Low = 20 Mbps, High = 250 kbps. Defaults to 20 Mbps if SLR is left floating
A 8 Bus I/O Digital bus I/O, A
B 9 Bus I/O Digital bus I/O, B
VCC 10 Bus Supply 3 V to 3.6 V supply for A and B bus lines