SLLSEV0F November   2017  – November 2023 TCAN1043-Q1 , TCAN1043G-Q1 , TCAN1043H-Q1 , TCAN1043HG-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings IEC Specification
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Dissipation Ratings
    7. 6.7 Electrical Characteristics
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Internal and External Indicator Flags (nFAULT and RXD)
      2. 8.3.2 Power-Up Flag (PWRON)
      3. 8.3.3 Wake-Up Request Flag (WAKERQ)
      4. 8.3.4 Wake-Up Source Recognition Flag (WAKESR)
      5. 8.3.5 Undervoltage Fault Flags
        1. 8.3.5.1 Undervoltage on VCC Fault
        2. 8.3.5.2 Undervoltage on VIO Fault
        3. 8.3.5.3 Undervoltage on VSUP Fault
      6. 8.3.6 CAN Bus Failure Fault Flag
      7. 8.3.7 Local Faults
        1. 8.3.7.1 TXD Dominant Timeout (TXD DTO)
        2. 8.3.7.2 TXD Shorted to RXD Fault
        3. 8.3.7.3 CAN Bus Dominant Fault
        4. 8.3.7.4 Thermal Shutdown (TSD)
        5. 8.3.7.5 RXD Recessive Fault
        6. 8.3.7.6 Undervoltage Lockout (UVLO)
        7. 8.3.7.7 Unpowered Device
        8. 8.3.7.8 Floating Terminals
        9. 8.3.7.9 CAN Bus Short Circuit Current Limiting
    4. 8.4 Device Functional Modes
      1. 8.4.1 CAN Bus States
      2. 8.4.2 Normal Mode
      3. 8.4.3 Silent Mode
      4. 8.4.4 Standby Mode
      5. 8.4.5 Go-to-Sleep Mode
      6. 8.4.6 Sleep Mode with Remote Wake and Local Wake Up Requests
        1. 8.4.6.1 Remote Wake Request via Wake Up Pattern (WUP)
        2. 8.4.6.2 Local Wake Up (LWU) via WAKE Input Terminal
      7. 8.4.7 Driver and Receiver Function Tables
      8. 8.4.8 Digital Inputs and Outputs
      9. 8.4.9 INH (Inhibit) Output
  10. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Bus Loading, Length and Number of Nodes
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1 CAN Termination
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout
        1. 9.4.1.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.8 Switching Characteristics

Over recommended operating conditions with TA = -55°C to 125°C (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYP(1)MAXUNIT
DRIVER SWITCHING CHARACTERISTICS
tpHRPropagation delay time, high TXD to driver recessiveSee Figure 7-2, Normal mode. RL = 60 Ω, CL = 100 pF, RCM = open50ns
tpLDPropagation delay time, low TXD to driver dominant40ns
tsk(p)Pulse skew (|tpHR - tpLD|)10ns
tRDifferential output signal rise time45ns
tFDifferential output signal fall time45ns
tTXD_DTODominant time outSee Figure 7-9, RL = 60 Ω, CL = open1.23.8ms
RECEIVER SWITCHING CHARACTERISTICS
tpRHPropagation delay time, bus recessive input to high RXDSee Figure 7-3
CL(RXD) = 15 pF		50ns
tpDLPropagation delay time, bus dominant input to RXD low output50ns
tROutput signal rise time (RXD)8ns
tFOutput signal fall time (RXD)8ns
tBUS_DOMDominant time outSee Figure 17, RL = 60 Ω, CL = open1.33.8ms
tCBFBus fault detection time45 Ω ≤ RCM ≤ 70 Ω, CL = open1.9µs
Wake Terminal (Wake input)
tWAKE_HTWAKE hold timeSee Figure 7-12 and Figure 7-13
Time required for LWU from a high to low or low to high on WAKE		550µs
Device Switching Characteristics
tPROP(LOOP1)Total loop delay, driver input (TXD) to receiver output (RXD), recessive to dominantSee Figure 7-5, Normal mode, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF100160ns
tPROP(LOOP2)Total loop delay, driver input (TXD) to receiver output (RXD), dominant to recessive110175ns
tMODE1Mode change timeSee Figure 7-4 and Figure 7-5, Mode change time for leaving Sleep mode to entering normal and silent mode after VCC and VIO have crossed UV thresholds20µs
tMODE2Mode change timeMode changes between Normal, Silent and Standby modes, and Sleep to Standby mode transition10µs
tUV_RE-ENABLERe-enable time after under voltage eventTime for device to return to normal operation from UVVCC or UVVIO under voltage event200µs
tPower_UpPower up time on VSUPSee Figure 7-11250µs
tWK_FILTERBus time to meet filtered bus requirements for wake up requestSee Figure 8-50.51.8µs
tWK_TIMEOUTBus Wake-up timeout valueSee Figure 8-50.52ms
tUVUndervoltage filter time for VIO and VCCVIO ≤ UVVIO or VCC < UVVCC159340ms
tGo_To_SleepMinimum hold time for transition to sleep modeEN = H and nSTB = L550µs
FD Timing Parameters
tBIT(BUS)Bit time on CAN bus output pins with tBIT(TXD) = 500 ns, all devicesNormal mode, RL = 60 Ω, CL = 100 pF,
CL(RXD) = 15 pF,
ΔtREC = tBIT(RXD) - tBIT(BUS)		435530ns
Bit time on CAN bus output pins with tBIT(TXD) = 200 ns, G device variants only155210ns
tBIT(RXD)Bit time on RXD output pins with tBIT(TXD) = 500 ns, all devices400550ns
Bit time on RXD output pins with tBIT(TXD) = 200 ns, G device variants only120220ns
ΔtRECReceiver timing symmetry with tBIT(TXD) = 500 ns, all devices-6540ns
Receiver timing symmetry with tBIT(TXD) = 200 ns, G device variants only-4515ns