9.2.2.2 Detailed Design Procedure
The design procedure for Sink application is listed as follows:
- Determine the loss profile on the DP input (C) and output (D) channels and cables. See Figure 20 for 6 mil trace insertion loss.
- Based upon the loss profile, determine the optimal configuration for the TDP142, to pass electrical compliance.
- See Figure 19 for information of Sink application on using the AC coupling capacitors, control pin resistors, and for recommended decouple capacitors from VCC pins to ground.
- AUX: AUXP has a 1 MΩ pull-up resistor and AUXN should have a 1 MΩ pull-down resistor. Theses 1 MΩ resistors must be on the TDP142 side of the 100 nF capacitors.
- HPDIN: The HPD signal should be routed to either pin 23 or pin 32 based on the GPIO/I2C mode. In that way, the TDP142 will always be able to conserve power when a source is not connected.
Table 14. HPD GPIO/I2C Selection
MODE |
HPD |
GPIO (I2C_EN = 0) |
Pin 32 |
I2C (I2C_EN != 0) |
Pin 23 |
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- Configure the TDP142 using the GPIO terminals or the I2C interface:
- GPIO – Using the terminals DPEQ0 and DPEQ1.
- It is recommended to start a higher equalization value like 13 dB and 15 dB first and adjust the value if necessary.
- I2C - Refer to the I2C Register Maps and the Programming section for a detail configuration procedures.
- The thermal pad must be connected to ground.