SLLSF86C May   2018  – March 2022 ISOW1412 , ISOW1432

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description Continued
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  Recommended Operating Conditions
    3. 8.3  Thermal Information
    4. 8.4  Power Ratings
    5. 8.5  Insulation Specifications
    6. 8.6  Safety-Related Certifications
    7. 8.7  Safety Limiting Values
    8. 8.8  Electrical Characteristics
    9. 8.9  Supply Current Characteristics at VISOOUT = 3.3 V
    10. 8.10 Supply Current Characteristics at  VISOOUT = 5 V
    11. 8.11 Switching Characteristics at VISOOUT = 3.3 V
    12. 8.12 Switching Characteristics at VISOOUT = 5 V
    13. 8.13 Insulation Characteristics Curves
    14. 8.14 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Power Isolation
    3. 10.3 Signal Isolation
    4. 10.4 RS-485
    5. 10.5 Functional Block Diagram
    6. 10.6 Feature Description
      1. 10.6.1 Power-Up and Power-Down Behavior
      2. 10.6.2 Protection Features
      3. 10.6.3 Failsafe Receiver
      4. 10.6.4 Glitch-Free Power Up and Power Down
    7. 10.7 Device Functional Modes
    8. 10.8 Device I/O Schematics
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Data Rate, Bus Length and Bus Loading
        2. 11.2.2.2 Stub Length
        3. 11.2.2.3 Insulation Lifetime
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 Support Resources
    4. 14.4 Trademarks
    5. 14.5 Electrostatic Discharge Caution
    6. 14.6 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

9 Parameter Measurement Information

In this section, GND1 = GNDIO, GND2 = GISOIN unless otherwise noted.
GUID-67CEC03B-27D7-42CF-8FCA-34D37922BD6E-low.gif Figure 9-1 Driver Voltages
GUID-6387ED66-D45E-451E-B60A-048FEB6F901E-low.gif
RL = 100 Ω for RS-422, RL = 54 Ω for RS-485
Figure 9-2 Driver Voltages
GUID-F23CE4E3-05E8-4A12-9C03-2D7A07CD9BF9-low.gif
CL includes fixture and instrumentation capacitance
Figure 9-3 Driver Switching Specifications
GUID-00AB716C-DC06-4FBC-9A3C-8FDAF6C98EA7-low.gif
Includes probe and fixture capacitance
Pass-fail criteria: Device is tested in both half-duplex and full-duplex conditions. Both the signal path and power path should be in specification compliant region during the application of CMTI pulse. This means no bit flips on R, and both VISOOUT and Driver VOD should be within specifications mentioned in electrical characterisitcs table.
Figure 9-4 Common Mode Transient Immunity (CMTI)—Full Duplex
GUID-98C7DB0C-DC37-4673-A6DB-0037F3580CCB-low.gif
CL includes fixture and instrumentation capacitance
Figure 9-5 Driver Enable and Disable Times
GUID-64C57356-3090-4B68-8A4D-B647F92CA137-low.gif Figure 9-6 Driver Enable and Disable Times
GUID-6FDB1E46-2977-4CF6-AD12-1C1CF9073561-low.gif
CL includes fixture and instrumentation capacitance
Figure 9-7 Receiver Switching Specifications
GUID-E6A5E8F2-ACD4-492C-BBD8-2EB0AAA58D3D-low.gif Figure 9-8 Receiver Enable and Disable Times
GUID-95B7B490-7635-41F1-B056-2A431D0F67AE-low.gif Figure 9-9 Receiver Enable and Disable Times
GUID-75403480-8E41-4723-9FF2-DAF30506553D-low.gif
The driver should not sustain any damage with this configuration
Figure 9-10 Short-Circuit Current Limiting
GUID-2664DAFD-FA86-446F-95C9-F8407C7F794F-low.gif
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω. At the input, 50-Ω resistor is required to terminate the input generator signal. The resistor is not required in the actual application. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 9-11 GPIO Channel: Switching Characteristics Test Circuit and Voltage Waveforms