SLLSFF7A may 2021 – december 2021 ISOW1044
PRODUCTION DATA
The ISOW1044 has built-in under-voltage lockout (UVLO) on all supplies (VDD, VIO and VISOOUT) with positive-going and negative-going thresholds and hysteresis. Both the power converter supply (VDD) and Logic supply (VIO) need to be present for the device to work. If either of them is below its UVLO, both the signal path and the power converter are disabled.
Assuming VIO is above its UVLO+, when the VDD voltage crosses the positive-going UVLO threshold during power-up, the DC-DC converter initializes and the power converter duty cycle is increased in a controlled manner. This soft-start scheme limits primary peak currents drawn from the VDD supply and charges the VISOOUT output in a controlled manner, avoiding overshoots. CAN BUS is in high impedance state in this duration. When the UVLO positive-going threshold is crossed on the secondary side VISOOUT pin, the feedback channel starts providing feedback to the primary controller. The regulation loop takes over and CAN drive output, Received data output (RXD) and gneral purpose logic channel (OUT) take their respective states defined by the inputs to the device i.e. Standby (STB), Driver data to be transmitted TXD, and general purpose logic input IN respectively. Designers should consider a sufficient time margin (typically 5 ms with 10-µF load capacitance) to allow this power up sequence before any usable system functionality.
When either of VDD or VIO is lost, the primary side DC-DC controller turns off when the UVLO lower threshold is reached. The VISOOUT capacitor then discharges depending on the isolation channels and BUS load.