SLLU350 April 2022 TUSB1142
Access to TUSB1142’s local I2C signals is provided through the JMP4 and JMP5 connectors. The TUSB1142 supports either 1.8 V and 3.3 V LVCMOS levels. The TUSB1142 VIO_SEL pin (JMP13) is used to select which voltage level is used. It is important that the I2C signalling levels meet the TUSB1142 LVCMOS levels when I2C interface is accessed through the connector.
When the MODE pin (JMP12) is floating, TUSB1142 will be enabled for I2C mode. The TUSB1142 I2C target address is determined by sampled state of SSEQ0/A0 (JMP7) and SSEQ1/A1 (JMP6).
A standalone external I2C host can be connected for debug and control purposes. An example of an external I2C Host controller is the Total Phase Aardvark I2C/SPI Host Adapter (Total Phase Part#: TP240141).
| SSEQ1/A1 PIN LEVEL |
SSEQ0/A0 PIN LEVEL |
7-bit Address | Bit 7 (MSB) | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 (W/R) |
|---|---|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 44h | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0/1 |
| 0 | R | 45h | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0/1 |
| 0 | F | 46h | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0/1 |
| 0 | 1 | 47h | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 0/1 |
| R | 0 | 20h | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0/1 |
| R | R | 21h | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0/1 |
| R | F | 22h | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0/1 |
| R | 1 | 23h | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0/1 |
| F | 0 | 10h | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0/1 |
| F | R | 11h | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0/1 |
| F | F | 12h | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0/1 |
| F | 1 | 13h | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 0/1 |
| 1 | 0 | Ch | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0/1 |
| 1 | R | Dh | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0/1 |
| 1 | F | Eh | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 0/1 |
| 1 | 1 | Fh | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0/1 |