SLLU358 November 2022 DS90LVRA2
1. Connect a 1.8 V, 2.5 V, or 3.3 V DC power supply to the banana jack P2 and P3. Since the CMOS output voltage is based on the power supply voltage, please make sure the power supply voltage matches with the CMOS output voltage requirement.
2. Provide LVDS differential signal to the DS90LVA2 inputs, J1/J3 (channel 1) or J5/J6 (channel 2). For channel 1, J1 is the inverting input while J3 is the non-inverting input. For channel 2, J6 is the inverting input while J5 is the non-inverting input. The DS90LVRA2 differential line receiver is capable of detecting signals as low as 100 mV, over a commonmode range of 0 to 2.4 V. This is related to the driver offset voltage which is typically +1.2 V. The driven signal is centered around this voltage and may shift ±1.2 V around this center point.
3. The CMOS output signals can be measured on an oscilloscope by connecting a SMA cable to J2 (channel 1) or J4 (channel 2).