SLLU379 March   2024 THVD4421

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1  Power Requirements
    2. 2.2  Board Setup and Operation
    3. 2.3  Header and Jumper Information
    4. 2.4  Resistor Information
    5. 2.5  Capacitor Information
    6. 2.6  LED Information
    7. 2.7  IC Information
    8. 2.8  Test Points
    9. 2.9  Assembly Instructions
    10. 2.10 Best Practices
  9. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  10. 4Additional Information
    1. 4.1 Known Hardware or Software Issues
    2. 4.2 Trademarks
  11. 5References

2.2 Board Setup and Operation

After the power supply of the THVD4421EVM has been configured, set up the board for operation. Before any operation of the board can occur, the operational mode and control pins must be configured. In Figure 3-1, the map to the J5 header pins is shown; assume that the board is oriented with J6 in the top left of the EVM. The numbered boxes correspond to the pin number for J9 as indicated in the schematic.

GUID-20240307-SS0I-FLBL-BRPQ-QJBTL6D7XD86-low.pngFigure 2-1 THVD4421EVM Control Signal Header Map

To select a configuration option, find the signal of interest on J5 according to Figure 3-1. If a low value is wanted, then shunt the top row header pin connected to the signal of interest to the pin on the left. If a high is wanted, then shunt the bottom row header pin connected to the signal of interest to the pin on the left. Next, the mode of operation is determined by the operational mode. This is controlled by the M0, and M1 connected to U1 by J5-11/12 and J5-15/16, respectively.

M1 (J5-15;J5-16)M0 (J5-11;J5-12)ModeComment
00RS-232 loopbackL3 reflects on L2/R2/R3; L4 reflects on L1/R4/R1.
01RS-2322T2R mode; L3, L4 are logic inputs for RS232 driver; L1, L2 are logic outputs.
10Half duplex RS-485L2 is RX Logic output; L3 is Driver Logic input; R1/R2 are Bus inverting and non-inverting terminals, respectively.
11RS-485 full duplexR1/R2 are inverting and non-inverting driver terminals; R3/R4 are non-inverting and inverting receiver terminals.

After the mode has been selected, the other features and control signals can be configured or connected to a signal source for the DIR and /SHDN signals.

SignalSignal Jumper+ Pin IDAssociated GND PinLogic ‘0’ OperationAssociated VIO PinLogic ‘1’ Operation
SLR

J5-3; J5-4

J5-2

RS485: 20Mbps

RS232: 1Mbps

J5-1

RS485: 500kbps

RS232: 250kbps

DIRJ5-7; J5-8

J5-6

RS485: RX mode

J5-5

RS485: TX mode

TERM_TXJ5-23; J5-24

J5-22

RS485 TX: unterminated

J5-21

RS485 TX: terminated with 120Ω

TERM_RXJ5-27; J5-28

J5-26

RS485 RX: unterminated

J5-25

RS485 RX: terminated with 120Ω

/SHDNJ5-31; J5-32

J5-30

Device in shutdown mode

J5-29

Device operational

The mode pins along with the TERM_TX and TERM_RX pins must be configured before communication starts as opposed to changing during communication for proper operation.

Logic and Bus Pins of the THVD4421

All the various modes of the THVD4421 share the use of the logic pins (denoted with the prefix (L)) and the bus pins (denoted with the prefix (R)).

Logic pins are for use when interfacing the THVD4421 with a controller. The logic pins are supplied and bounded by the VIO voltage, which means that these pins can accept GND to VIO input voltages and can output GND to VIO voltages. All logic pins L1 – L4 are accessible through 4x2 headers J1-J4 that populate the left side of the board when oriented with J6 in the top left corner. Figure 3-2 shows the headers pinouts.

GUID-20240307-SS0I-1MVJ-4WCD-QGN2JJ6PL6X4-low.png Figure 2-2 Logic Side Data I/O Header Map

The function of each individual (L) pin depends on the mode in which the THVD4421 is being operated in.

Bus pins are the higher voltage tolerant pins for use with RS-485 or RS-232 depending on chosen operation mode. The bus pins are accessible in a few different ways depending on mode of use. Both RS-232 and RS-485 modes have all R pin signals routed to an 4x2 header J14. If every row of header J14 is shunted, then all signals R1-R4 are available on the D-SUB connector J18. If headers J12 and J13 are shunted, then R1 and R2 signals are available on terminal block J17. If headers J10 and J11 are shunted, then R3 and R4 signals are available on terminal block J16. A brief summary is given in the table below.

U1 PinOutput Option 1Output Option 2Output Option 3Output Option 4

R1

J14; Row 1; Column 1

J12; Column 1

J17 (if J12 is shunted)

J18 (if J14 row 1 is shunted)

R2

J14; Row 2; Column 1

J13; Column 1

J17 (if J13 is shunted)

J18 (if J14 row 2 is shunted)

R3

J14; Row 3; Column 1

J10; Column 1

J16 (if J10 is shunted)

J18 (if J14 row 3 is shunted)

R4

J14; Row 4; Column 1

J11; Column 1

J16 (if J11 is shunted)

J18 (if J14 row 4 is shunted)

How these pins are connected depends on the chosen operation mode and personal preference of the end user.

RS-232 Operation

With an understanding of the general architecture of the device and EVM, a more thorough look at the RS-232 modes of operation is important. When entering the mode 001 for M1 and M0, respectively, the device enters RS-232.

ModeL1L2L3L4R1R2R3R4
01Not usedConsole side RXConsole side inputConsole side inputRS-232 bus inputRS-232 bus inputRS-232 bus outputRS-232 bus output

This is commonly referred to as a 2T2R setup, as there are two transmitters and two receivers. At an individual transceiver level, the type of RS-232 signal being transmitter or received is not important to the transceiver as the PHY layer characteristics are the same regardless of RS-232 signal type. However, the specific configuration is generally used with the following RS-232 signals: TX, RX, RTS, and CTS. While this configuration of signals is not strictly required, most 2T2R RS-232 applications use these signals and require this configuration. If J18 (the DSUB connector) is used, then the pinout of the connector mimics the standard placement of the aforementioned RS-232 cables.

U1 PinStandard RS-232 Circuit MnemonicJ18 Pin
R1RX2
R2CTS8
R3TX3
R4RTS7

Many RS-232 test plans typically require a loop back test. The THVD4421 integrates a RS-232 loopback mode to make testing quick and simple. When putting the device into mode 00 for M1 and M0, respectively, the THVD4421 enters RS-232 loopback mode. This creates shorts on R2 to R3 and R1 to R4. This configuration allows a signal on L1 to be received on L4, while also showing up on pins R1 and R4. The same can be applied when looking at R2 and R3.

ModeL1L2L3L4R1R2R3R4
00Loopback RX for L4Loopback RX for L3L3 -> R3 -> R2 -> L2L4 -> R4 -> R1 -> L1Shorted to R4Shorted to R3Shorted to R2Shorted to R1

RS-485 Operation

With RS-232 operational modes covered, this is a brief overview of the RS-485 operation modes. There are two different operational modes of the RS-485 portion of the transceiver: half duplex and full duplex.

Half duplex operation is a very common implementation of RS-485 and entered when the mode is 10 for M1 and M0, respectively. In half duplex mode, the receive and transmit bus facing pins (denoted R# on the THVD4421) are shared by the transceiver; allowing for asynchronous bi-directional communication on two wires with the trade-off being that the bus can only have 1 driver at a time and a device cannot receive and transmit data simultaneously.

ModeL1L2L3L4R1R2R3R4
10UnusedConsole side RXConsole side TXUnusedNon-inverting bus facing pinInverting bus facing pinUnusedUnused

The termination resistor shown is disabled by default. In half duplex mode, TERM_RX is a don’t care value and the integrated termination is only controlled by TERM_TX. The driver input is connected to L3 and the RS-485 console side output is L2.

The next mode of operation is full duplex operation, which is mode 11 for M1 and M0, respectively. This mode of operation separates the driver and receiver of the RS-485 transceiver, which leads to a 4-signal wire interface.

ModeL1L2L3L4R1R2R3R4
10UnusedConsole side RXConsole side TXUnusedNon-inverting bus facing driverInverting bus facing driverNon-inverting bus facing receiverInverting bus facing receiver