Line Driver Pop Noise Design Consideration on Subwoofer

Line Driver Pop Noise Design Consideration on Subwoofer

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1 Introduction

At the output stage of the class-D amplifier of power-on or power-off, the noise is generated by a voltage difference before it stays its steady state. Usually without proper circuit design or power sequence control, the system event related to the analog amplifier generates a click or a pop. For Class D amplifier of the audio portion, audible click sound, mainly depending on the both amplifier and the amplifier, is typically at PWM start and stop.

System design considers the pop sound at the system level at the beginning to avoid the pop noise. The power up and the power down is, in most occasions, the pop noise occurred. The power up and power down impacts the DC offset of amplifier input, which results in the voltage transient change. This short time voltage transient outputs and applies on the speaker to generate the undesired sound. If the audio input source change also has the possibility to get the voltage transient change, then the amplifier outputs the pop noise. For more details on how to define and measure the pop noise, see the Click and Pop Measurement Technique.

Impedance mismatching on the input components will also dramatically impact the DC offset that mainly dominates the pop noise occasions on the system design.

Pop and click, which can be observed through the portable speaker or headphone when you power on or off the power supply, are the appellation given to the popping noise. Pop and click, especially true for those destined for the SE input circuit, is a characteristic that makes a lot of impact in the world of audio amplifiers. This application report indicates the methods on how to eliminate the pop noise with minimal audio low frequency attenuation impact on woofer application.

2 Smart TV Audio Systems Overview

Smart TV audio systems usually requires the entire audible range of frequencies, which is beyond the capability of any single mid-power (<30 Watt) speaker. The mid-power speaker operating frequency range is 100Hz to 18 kHz. Therefore, high-end TVs often combine several drivers to make more realistic sounds by designing line-out with an active external woofer with lower resonance frequency of 20Hz.

3 TV 2.1CH Typical Application Design

TAS5760LD is very popular in the TV application, which integrates a stereo 20Watt class D amplifier with the line driver. Smart TV SOC can output inter-IC sound (I2S) and analog signals from the digital-to-analog converter (DAC) to the TAS5760LD class D amplifier that includes hardware and software inter-integrated circuit (I2C) control modes, integrated line driver, and a wide power supply operating range to enable use in a multitude of applications. Therefore, smart TV can adapt TAS5760LD to drive the twitter speaker and use the integrated line driver to drive external active woofer.

Typical circuit diagrams highlight the required external passive components and system level connections for proper operation. Figure 2 shows the stereo mixer circuit to mono line driver output. The design requirement is to make 20 to approximately 200Hz frequency response flat within ±3dB range. The feedback network is around 1.5 V/V. In a general case, the line driver port output impedance is designed to 1 kΩ.

If the typical circuit follows the suggested power sequence as shown in Figure 3, there is no pop noise due to DirectPath architecture, which makes sure the output voltages are centered at zero volts with the capability to swing to the positive rail or negative rail.

In the TV system design, 3.3 V power of the line driver sometime tied to SOC's power supply. So, it is not able to do the power sequence control on line driver and SOC side. However, the SOC DAC output generated the larger transient while the SOC 3.3 V turned off, which resulted in the TAS5760LD line-in receive the unexpected transient.

The slightly voltage transient can be observed on the TAS5760 line out if TAS5760LD AVDD turns off and the design uses the line out to drive the external active woofer speaker. (>150Watt)

In the above design scenario, the output impedance design and the feedback network resistor design are critical factor here to minimize the voltage transient from SOC output. The design challenging is need to make sure the lower frequency 20 to approximately 200HZ within ±3dB range during selecting the proper passive component values.

This application report, with TINA simulation and real PCB design cases, studies the relation between 1 kΩ and 270 Ω output impedance on pop noise improvement. Secondly, this application report discusses the approach by increasing the feedback network resistor values to improve the pop noise. The pop noise was improved by increasing the feedback network resistor 2 times value.

Resistor R5 and resitor R6 are parallel, their effective resistance Reff can be determined from Equation 1. Here is the example for R_lineout 1 kΩ and R_woofer 33 kΩ case, the equivalent resistor is 1 kΩ.

For the line driver power off, the SOC output usually has the DC level changed, which results in the voltage transient in the line driver input side. Before transient voltage happens, the line driver needs to maintain 3.3 V power supply and keep (DR_MUTE)̅ as low level. This allows the TAS5760LD analog amp output impedance stay at 100 mΩ. The low impedance can effectively reduce the pop noise.

The power down sequence is discussed in Section 3.1. The design needs to keep the line driver power at 3.3 V when turning down the SOC power 3.3 V.

3.1 Power Down Sequence

1. Mute TAS5760 HP.
2. Turn down SOC 3.3 V (output impedance keeps low. It can avoid pop).
3. Shutdown HP 3.3 V.

Figure 4 is frequency response TINA simulation of the typical line drive circuit (subwoofer stereo to mono line driver). The frequency response from 20Hz to approximately 200Hz is within ±3dB range.

In Figure 5, the big DC level transient at the line driver input, but there is no transient voltage at line driver output. The reason is SOC 3.3 V power and line driver 3.3 V power are separated. The line driver 3.3 V power was not provided while there is big DC level transient from SOC's output. Figure 6 shows that the case SOC and line driver share the same 3.3 V power supply. The voltage drop in channel 1 due to 3.3 V power supply for SOC and line driver turns off at the same time. Channel 2‘ｓ waveform shows the line driver of TAS5760LD output transient around -11mV. CH1 is input from SOC. R CH2 is line driver output. CH3 is (DR_MUTE )̅ controlled waveform by SOC’s GPIO. CH4 is 3.3V for line driver power.