SLOA294A June   2020  – April 2024 TPS3851-Q1 , TPS7A16A-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Types of Faults and Quantitative Random Hardware Failure Metrics
  6. 3 Random Failures Over a Product Lifetime and Estimation of BFR
  7. 4 BFR Estimation Techniques
  8. 5 Siemens SN 29500 FIT model
  9. 6 IEC TR 62380
  10. 7 Recommended Assumptions for BFR Calculations
  11. 8 Special Considerations for Transient Faults
  12. 9 BFR Differences (Due to Package) Between IEC TR 62380 and SN 29500
  13. 10Effect of Power-on Hours on BFR
  14. 11What Can You Expect for TI Products
  15. 12Summary
  16. 13References
  17. 14Revision History

Abstract

Functional safety standards like International Electrotechnical Commission (IEC) 61508(1) and International Organization for Standardization (ISO) 26262(2) require that semiconductor device manufacturers address both systematic and random hardware failures. Systematic failures are managed and mitigated by following rigorous development processes. Random hardware failures must adhere to specified quantitative metrics to meet hardware safety integrity levels (SILs) or automotive SILs (ASILs). Consequently, systematic failures are excluded from the calculation of random hardware failure metrics.