SLOA343 August   2024 TPS543820 , TPS543A22 , TPSM843620 , TPSM843A22

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Layout Techniques to Reduce EMI
    1. 2.1 Placement of Passive Components
    2. 2.2 Ground Flooding
    3. 2.3 Minimize Number of Antennas
    4. 2.4 Via Stitching
    5. 2.5 Additional Steps to Minimize Impedance or Noise
  6. 3Designing for EMI-Optimized Layout
  7. 4Test Results for Radiated Interference
  8. 5EMI Filtering
  9. 6Summary
  10. 7References

Additional Steps to Minimize Impedance or Noise

Additional ways to minimize impedance and reduce EMI in your PCB are listed below:

  • Placing extra vias near all ground pins can further minimize impedance in a similar manner as described previously.
  • Avoid open space with no ground pours around. Avoid big power/signal pours generally.
  • Reduce PCB height as much as possible. You can do this by adjusting the center dielectric so the current between layers has less distance to travel.