SLOA343 August   2024 TPS543820 , TPS543A22 , TPSM843620 , TPSM843A22

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Layout Techniques to Reduce EMI
    1. 2.1 Placement of Passive Components
    2. 2.2 Ground Flooding
    3. 2.3 Minimize Number of Antennas
    4. 2.4 Via Stitching
    5. 2.5 Additional Steps to Minimize Impedance or Noise
  6. 3Designing for EMI-Optimized Layout
  7. 4Test Results for Radiated Interference
  8. 5EMI Filtering
  9. 6Summary
  10. 7References

6 Summary

As discussed in this application note, changes in PCB layout and input filtering are shown to improve both radiated and conducted emissions. Considering these optimizations is critical in the next circuit design for lowered EMI performance and quality results in the final product.