SLOS412E April   2003  – November 2024 RC4580

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Operating Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Unity-Gain Bandwidth
      2. 6.3.2 Common-Mode Rejection Ratio
      3. 6.3.3 Slew Rate
    4. 6.4 Device Functional Mode
  8. Application and Implementation
    1. 7.1 Typical Application
      1. 7.1.1 Design Requirements
      2. 7.1.2 Detailed Design Procedure
        1. 7.1.2.1 Amplifier Selection
        2. 7.1.2.2 Passive Component Selection
      3. 7.1.3 Application Curves
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Thermal Information

THERMAL METRIC(1) RC4580 UNIT
D
(SOIC)
P
(PDIP)
PW
(TSSOP)
DGK
(VSSOP)
DDF
(SOT-23)
8 PINS 8 PINS 8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 109 99.2 163 160.5 177.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 55.7 78.8 38 70.2 96.5
RθJB Junction-to-board thermal resistance 49 61.9 90.6 95.6 95.2
ψJT Junction-to-top characterization parameter 10.6 44.8 1.3 8.8 9.5
ψJB Junction-to-board characterization parameter 48.6 61.2 88.9 94.0 95.0
RθJC(bot) Junction-to-case (bottom) thermal resistance
For more information about traditional and new thermal metrics, see the Semiconductor IC Package Thermal Metrics application note.