SLOS412E April   2003  – November 2024 RC4580

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Operating Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Unity-Gain Bandwidth
      2. 6.3.2 Common-Mode Rejection Ratio
      3. 6.3.3 Slew Rate
    4. 6.4 Device Functional Mode
  8. 7 Application and Implementation
    1. 7.1 Typical Application
      1. 7.1.1 Design Requirements
      2. 7.1.2 Detailed Design Procedure
        1. 7.1.2.1 Amplifier Selection
        2. 7.1.2.2 Passive Component Selection
      3. 7.1.3 Application Curves
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions


RC4580 D, PW, and DGK Packages8-Pin SOIC, TSSOP, and VSSOP (Top View)
Figure 4-1 D, PW, and DGK Packages
8-Pin SOIC, TSSOP, and VSSOP
(Top View)

RC4580 DDF Package8-Pin SOT-23 (Top View)
Figure 4-2 DDF Package
8-Pin SOT-23
(Top View)
Table 4-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
1IN+ 3 I Noninverting input
1IN– 2 I Inverting input
1OUT 1 O Output
2IN+ 5 I Noninverting input
2IN– 6 I Inverting input
2OUT 7 O Output
VCC+ 8 — Positive supply
VCC– 4 — Negative supply