SLOS681C January   2011  – August 2019 DRV632

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Diagram
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Operating Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Line Driver Amplifiers
      2. 9.3.2 Charge-Pump Flying Capacitor and PVSS Capacitor
      3. 9.3.3 Decoupling Capacitors
      4. 9.3.4 Gain-Setting Resistor Ranges
      5. 9.3.5 Input-Blocking Capacitors
      6. 9.3.6 DRV632 UVP Operation
      7. 9.3.7 External Undervoltage Detection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Using the DRV632 as a Second-Order Filter
      2. 9.4.2 Mute Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Charge-Pump Flying, PVSS and Decoupling Capacitors
        2. 10.2.2.2 Second-Order Active Low-Pass Filters
        3. 10.2.2.3 UVP Resistor Divider
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Gain-Setting Resistors
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

12.1.1 Gain-Setting Resistors

The gain-setting resistors, RIN and Rfb, must be placed close to pins 13 and 17, respectively, to minimize capacitive loading on these input pins and to ensure maximum stability of the DRV632. For the recommended PCB layout, see the DRV632EVM User's Guide.