Loading [MathJax]/jax/output/SVG/fonts/TeX/fontdata.js
Menu
Product
Email
PDF
Order now
TPA6404-Q1 45W, 2MHz Analog Input 4-Channel Automotive Class-D Audio Amplifier with Load Dump Protection and I2C Diagnostics
SLOS970B
January 2018 – January 2025
TPA6404-Q1
PRODUCTION DATA
CONTENTS
SEARCH
TPA6404-Q1 45W, 2MHz Analog Input 4-Channel Automotive Class-D Audio Amplifier with Load Dump Protection and I2C Diagnostics
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Parameter measurement Information
7
Detailed description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Differential Analog inputs
7.3.2
Gain Control and AC-Coupling
7.3.3
High-Frequency Pulse-Width Modulator (PWM)
7.3.4
Gate Drive
7.3.5
Power FETs
7.3.6
Load Diagnostics
7.3.6.1
DC Load Diagnostics
7.3.6.1.1
Automatic DC Load Diagnostics
7.3.6.1.2
I2C Controlled DC Load Diagnostics
7.3.6.2
Line Output Diagnostics
7.3.6.3
AC Load Diagnostics
7.3.6.3.1
Impedance Phase Reference Measurement
7.3.6.3.2
Impedance Phase Measurement
7.3.6.3.3
Impedance Magnitude Measurement
7.3.7
Protection and Monitoring
7.3.7.1
Over current Limit (ILIMIT)
7.3.7.2
Over current Shutdown (ISD)
7.3.7.3
DC Detect
7.3.7.4
Clip Detect
7.3.7.5
Global Over Temperature Warning (OTW), Over Temperature Shutdown (OTSD) and Thermal Foldback (TFB)
7.3.7.6
Channel Over Temperature Warning [OTW(i)] and Shutdown [OTSD(i)]
7.3.7.7
Thermal Foldback
7.3.7.8
Undervoltage (UV) and Power-On-Reset (POR)
7.3.7.9
Over Voltage (OV) and Load Dump
7.3.8
Power Supply
7.3.8.1
Power-Supply Sequence
7.3.9
Hardware Control Pins
7.3.9.1
FAULT
7.3.9.2
WARN
7.3.9.3
MUTE
7.3.9.4
STANDBY
7.4
Device Functional Modes
7.4.1
Operating Modes and Faults
7.5
Programming
7.5.1
I2C Serial Communication Bus
7.5.2
I2C Bus Protocol
7.5.3
Random Write
7.5.4
Sequential Write
7.5.5
Random Read
7.5.6
Sequential Read
8
Registers
8.1
Register Maps
8.1.1
Mode Control Register (address = 0x00) [default = 0x00]
8.1.2
Miscellaneous Control 1 Register (address = 0x01) [default = 0x32]
8.1.3
Miscellaneous Control 2 Register (address = 0x02) [default = 0x62]
8.1.4
Channel State Control Register (address = 0x04) [default = 0x55]
8.1.5
DC Load Diagnostic Control 1 Register (address = 0x09) [default = 0x00]
8.1.6
DC Load Diagnostic Control 2 Register (address = 0x0A) [default = 0x11]
8.1.7
DC Load Diagnostic Control 3 Register (address = 0x0B) [default = 0x11]
8.1.8
DC Load Diagnostic Report 1 Register (address = 0x0C) [default = 0x00]
8.1.9
DC Load Diagnostic Report 2 Register (address = 0x0D) [default = 0x00]
8.1.10
DC Load Diagnostics Report 3—Line Output—Register (address = 0x0E) [default = 0x00]
8.1.11
Channel State Reporting Register (address = 0x0F) [default = 0x55]
8.1.12
Channel Faults (Over current, DC Detection) Register (address = 0x10) [default = 0x00]
8.1.13
Global Faults 1 Register (address = 0x11) [default = 0x00]
8.1.14
Global Faults 2 Register (address = 0x12) [default = 0x00]
8.1.15
Warnings Register (address = 0x13) [default = 0x20]
8.1.16
Pin Control Register (address = 0x14) [default = 0x00]
8.1.17
AC Load Diagnostic Control 1 Register (address = 0x15) [default = 0x00]
8.1.18
AC Load Diagnostic Control 2 Register (address = 0x16) [default = 0x00]
8.1.19
AC Load Diagnostic Report Ch1 through CH4 Registers (address = 0x17–0x1A) [default = 0x00]
8.1.20
AC Load Diagnostic Report Phase High Register (address = 0x1B) [default = 0x00]
8.1.21
AC Load Diagnostic Report Phase Low Register (address = 0x1C) [default = 0x00]
8.1.22
AC Load Diagnostic Report STI High Register (address = 0x1D) [default = 0x00]
8.1.23
AC Load Diagnostic Report STI Low Register (address = 0x1E) [default = 0x00]
8.1.24
Miscellaneous Control 3 Register (address = 0x21) [default = 0x00]
8.1.25
Clip Control Register (address = 0x22) [default = 0x01]
8.1.26
Clip Warning Register (address = 0x24) [default = 0x00]
8.1.27
Current LIMIT Status Register (address = 0x25) [default = 0x00]
8.1.28
Fault and Warning Pin Control Register (address = 0x27) [default = 0x7F]
8.1.29
Thermal Foldback Control Register (address = 0x28) [default = 0x00]
8.1.30
AC Diagnostic Frequency Control Register (address = 0x2A) [default = 0x32]
8.1.31
SYNC PIN Control Register (address = 0x2B) [default = 0x02]
9
Application and Implementation
9.1
Application Information
9.1.1
AM Radio Avoidance
9.1.2
Parallel BTL Operation (PBTL)
9.1.3
Reconstruction Filter Design
9.1.4
Line Driver Applications
9.2
Typical Applications
9.2.1
BTL Application
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Hardware Design
9.2.1.2.2
Bootstrap Capacitors
9.2.1.2.3
Output Reconstruction Filter
9.2.1.3
Application Curves
9.2.1.4
PBTL Application
9.2.1.4.1
Design Requirements
9.2.1.4.2
Detailed Design Procedure
9.2.1.4.2.1
Hardware Design
9.2.1.4.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.1.1
Electrical Connection of Thermal pad and Heat Sink
9.4.1.2
EMI Considerations
9.4.1.3
General Considerations
9.4.2
Layout Example
9.4.3
Thermal Considerations
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Electrostatic Discharge Caution
10.4
Glossary
10.5
Support Resources
10.6
Trademarks
11
Revision History
12
Mechanical, Packaging, and Orderable Information
12.1
Package Option Addendum
12.1.1
Packaging Information
12.1.2
Tape and Reel Information
IMPORTANT NOTICE
search
No matches found.
Full reading width
Full reading width
Comfortable reading width
Expanded reading width
Card for each section
Card with all content
