SLOSE58B May   2020  – May 2022 DRV8932

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Bridge Control
      2. 7.3.2 Current Regulation
      3. 7.3.3 Decay Modes
        1. 7.3.3.1 Blanking time
      4. 7.3.4 Charge Pump
      5. 7.3.5 Linear Voltage Regulators
      6. 7.3.6 Logic and Quad-Level Pin Diagrams
        1. 7.3.6.1 nFAULT Pin
      7. 7.3.7 Protection Circuits
        1. 7.3.7.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.7.2 VCP Undervoltage Lockout (CPUV)
        3. 7.3.7.3 Overcurrent Protection (OCP)
        4. 7.3.7.4 Thermal Shutdown (OTSD)
        5. 7.3.7.5 Fault Condition Summary
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode (nSLEEP = 0)
      2. 7.4.2 Operating Mode (nSLEEP = 1)
      3. 7.4.3 nSLEEP Reset Pulse
      4. 7.4.4 Functional Modes Summary
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Regulation
        2. 8.2.2.2 Power Dissipation and Thermal Calculation
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

8.2.2.2 Power Dissipation and Thermal Calculation

The output current and power dissipation capabilities of the device are heavily dependent on the PCB design and external system conditions. This section provides some guidelines for calculating these values.

Total power dissipation for the device is composed of three main components. These are the power MOSFET RDS(ON) (conduction) losses, the power MOSFET switching losses and the quiescent supply current dissipation. While other factors may contribute additional power losses, these other items are typically insignificant compared to the three main items.

PTOT = PCOND + PSW + PQ

For loads connected to VM, assuming that all the outputs are loaded with same current, total conduction loss can be expressed as -

PCOND = 4 x (IOUT)2 x RDS(ONL)

As the high-side and low-side MOSFETs of the DRV8935 have the same on-resistance, the conduction loss will be independent of the duty cycle of the input PWM or the amount of PWM off-time. It should be noted that RDS(ON) has a strong correlation with the device temperature. A curve showing the normalized RDS(ON) with temperature can be found in the Typical Characteristics curves.

PCOND = 4 x (0.6-A)2 x 0.45-Ω = 0.648-W

PSW can be calculated from the nominal supply voltage (VM), regulated output current (IOUT), switching frequency (fPWM) and the device output rise (tRISE) and fall (tFALL) time specifications.

Assuming that all the four outputs are switching simultaneously -

PSW = 4 x (PSW_RISE + PSW_FALL)

PSW_RISE = 0.5 x VM x IOUT x tRISE x fPWM

PSW_FALL = 0.5 x VM x IOUT x tFALL x fPWM

PSW_RISE = 0.5 x 24 V x 0.6 A x 100 ns x 40 kHz = 0.0288 W

PSW_FALL = 0.5 x 24 V x 0.6 A x 100 ns x 40 kHz = 0.0288 W

PSW = 4 x (0.0288W + 0.0288W) = 0.2304 W

PQ can be calculated from the nominal supply voltage (VM) and the IVM current specification.

PQ = VM x IVM = 24 V x 5 mA = 0.12 W

The total power dissipation (PTOT) is calculated as the sum of conduction loss, switching loss and the quiescent power loss.

PTOT = PCOND + PSW + PQ = 0.648-W + 0.2304-W + 0.12-W = 0.9984-W

For an ambient temperature of TA and total power dissipation (PTOT), the junction temperature (TJ) is calculated as

TJ = TA + (PTOT x RθJA)

Considering a JEDEC standard 4-layer PCB, the junction-to-ambient thermal resistance (RθJA) is 33 °C/W for the HTSSOP package and 43 °C/W for the VQFN package.

Assuming 25°C ambient temperature, the junction temperature for the HTSSOP package is calculated as -

TJ = 25°C + (0.9984-W x 33°C/W) = 57.95 °C

The junction temperature for the VQFN package is calculated as -

TJ = 25°C + (0.9984-W x 43°C/W) = 67.93 °C

It should be ensured that the device junction temperature is within the specified operating region.