SLOU576 November   2024 TAS5815

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Setup
      1. 2.1.1 I2C Device Addresses
    2. 2.2 Header and Jumper Information
    3. 2.3 Test Points
  9. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layout
    3. 3.3 Bill of Materials
  10. 4Additional Information
    1. 4.1 Trademarks

2.2 Header and Jumper Information

Table 2-2 TAS5815PWP Circuit Jumpers
Designator Name Positions Description
J4 DVDD1

IN: Default, IOVDD supplies DVDD for device 1

OUT: DVDD disconnected for device 1

 Drives the digital power supply for the first TAS5815PWP. If DVDD current draw wants to be measured need to externally drive DVDD to pin 2
J10 DVDD2

IN: Default, IOVDD supplies DVDD for device 2

OUT: DVDD disconnected for device 2

 Drives the digital power supply for the second TAS5815PWP. If DVDD current draw wants to be measured need to externally drive DVDD to pin 2
J2 PVDD1

IN: Default, PVDD_5815 supplies PVDD for device 1

OUT: PVDD disconnected for device 1

 Drives the analog power supply for the first TAS5815PWP device
J9 PVDD2

IN: Default, PVDD_5815 supplies PVDD for device 2

OUT: PVDD disconnected for device 2

 Drives the analog power supply for the second TAS5815PWP device
J13 SDIN2_SEL

1-2: Default, SDIN from I2S MUX

2-3: SDOUT from Device A

 Selects the SDIN for the second TAS5815PWP
J1 Left1A N/A Positive output for the left channel of device 1
J3 Left1B N/A Negative output for the left channel of device 1
J5 Right1A N/A Positive output for the right channel of device 1
J6 Right1B N/A Negative output for the right channel of device 1
J7 Left2A N/A Positive output for the left channel of device 2
J8 Left2B N/A Negative output for the left channel of device 2
J11 Right2A N/A Positive output for the right channel of device 2
J12 Right2B N/A Negative output for the right channel of device 2
Table 2-3 R6: Device 1 - I2C Address
R6 Address
4.7kΩ 0xA8
15kΩ 0xAA
47kΩ 0xAC
120kΩ 0xAE
Table 2-4 R12: Device 2 - I2C Address
R12 Address
4.7kΩ 0xA8
15kΩ 0xAA
47kΩ 0xAC
120kΩ 0xAE
Table 2-5 XMOS Circuit Jumpers
Designator Name Position Description
J14 SCL

1-2: Default, PPC3 drives XMOS I2C bus to the TAS5815PWPs

OUT: Use Pin 1 and 3 to drive SCL externally to the two TAS5815PWP on the EVM

 The SCL Jumper offers a few options to provide or receive I2C signals. Default configuration connects the XMOS I2C bus to the two TAS5815PWP to configure the device with PPC3. Disconnecting the jumper allows for the XMOS I2C bus to be connected to an external TAS5815 system board to configure that device with PPC3 using pins 2 and 3. Alternatively can use an external I2C bus to drive the two TAS5815PWP on the EVM using pins 1 and 3.
J15 SDA

1-2: Default, PPC3 drives XMOS I2C bus to the two TAS5815PWP

OUT: Use Pin 1 and 3 to drive SDA externally to the two TAS5815PWP on the EVM

 The SDA Jumper offers a few options to provide or receive I2C signals. Default configuration connects the XMOS I2C bus to the two TAS5815PWP to configure the device with PPC3. Disconnecting the jumper allows for the XMOS I2C bus to be connected to an external TAS5815 system board to configure that device with PPC3 using pins 2 and 3. Alternatively can use an external I2C bus to drive the two TAS5815PWP on the EVM using pins 1 and 3.
Table 2-6 Audio Input IO Circuit Jumpers and Switches
Designator Name Positions Description
J18 IOVDD SEL

1-2: 1.8V IOVDD

2-3: Default, 3.3V IOVDD

 Sets the IOVDD voltage for the Digital Interfaces
J19 SCLK

1-2: Default, Bypass mode that sends SPDIF/XMOS I2S input to the two TAS5815PWP

2-3: Connect external PSIA connector to Pin 2-3 to drive input to the two TAS5815PWP

 Sets the SCLK input to be driven internally using USB or optical input or driven externally with a PSIA connector
J20 LRCLK

1-2: Default, Bypass mode that sends SPDIF/XMOS I2S input to the two TAS5815PWP

2-3: Connect external PSIA connector to Pin 2-3 to drive input to the two TAS5815PWP

 Sets the LRCLK input to be driven internally using USB or optical input or driven externally with a PSIA connector
J21 SDIN

1-2: Default, Bypass mode that sends SPDIF/XMOS I2S input to the two TAS5815PWP

2-3: Connect external PSIA connector to Pin 2-3 to drive input to the two TAS5815PWP

 Sets the SDIN input to be driven internally using USB or optical input or driven externally with a PSIA connector
J23 GPIO1 SEL

1-2: Default, sends the SDOUT data to the XMOS

2-3: Sends SDOUT Data to SPIDIF Optical Output

 If the device is not using the Class-H feature, then this jumper can be using to sent the output I2S/TDM data to an external source of either the XMOS and USB or the optical output
S1 I2S SEL

XMOS: Default, audio input from XMOS

SPDIF: Audio input from SPDIF

 Sets the audio input source for the two TAS5815PWP on the EVM
Table 2-7 Power Supply Circuit Jumpers
Designator Name Positions Description
J30 Ext_BST

IN: Default, TAS5815PWP Class H PWM output drives the TPS552882 Buck-Boost voltage through the Feedback Pin

OUT: Disconnect Class H PWM signal

 This jumper is used to connect the TPS552882 Feedback Pin to the voltage generated by the Class H PWM Control Signal of the TAS5815PWP
J33 BST_Bypass

IN: Max BST Output

OUT: Default

 When the device is using Class-H, shorting the BST Bypass jumper sets the TPS552882 Boost to the max Boost Output
J31 ClassH_PWM

IN: Default, TAS5815PWP Class H PWM output is sent to the TPS552882

OUT: Disconnect TAS5815PWP Class H PWM signal

 When using Class H, shorting this jumper lets the TAS5815PWP drive the TPS552882 Buck-Boost voltage.
J34 5V N/A The 5V rail used to power various components on the EVM.
J35 3.3V N/A

The 3.3V rail used to power various components on the EVM.

J27 PVDD_DCDC

IN: TPS552882 Buck-Boost voltage is sent to the TAS5815PWP

OUT: Default, no Buck-Boost connection

This jumper lets the user decide to use the TPS552882 Buck-Boost voltage for the TAS5815PWP devices
J29 PVDD_EXT

IN: Default, an external PVDD is sent to the TAS5815PWP

OUT: no external PVDD connection

This jumper lets the user decide to use an external PVDD supply for the TAS5815PWP devices
J25 Battery

N/A

Battery input to the TAS5815PWP EVM
J28 PVDD

N/A

External PVDD input to the TAS5815PWP EVM
J26/J32 GND

N/A

Battery and PVDD ground inputs to the TAS5815PWP EVM
Table 2-8 J24: IO-EXT Pin Description
Number Name Description
All odd pins (1 to 27) GND Ground connection
2 IOVDD The 3.3V or 1.8V digital power supply
4,6 N/A Unused floating pins
8 SCL I2C serial control clock input for the TAS5815PWP
10 SDA I2C serial control clock input for the TAS5815PWP
12 LRCLK I2S/TDM Frame Clock
14 SCLK I2S/TDM Bit Clock
16 SDIN I2S/TDM Data
18 SDOUT_Hybrid_Pro General-purpose input/output configured to be the Class-H PWM control pin or SDOUT of device 1
20 SDOUT2 General-purpose input/output configured to be the SDOUT of device 2
22 PDN1 Power down signal for device 1
24 PDN2 Power down signal for device 2
26 ADR_FAULT1 Address and fault signal for device 1
28 ADR_FAULT2 Address and fault signal for device 2