SLOU582 September   2024

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Pin Specifications
    2. 2.2 Power Requirements
    3. 2.3 Input Connectors
    4. 2.4 Output Connectors
    5. 2.5 Onboard Bandpass Filter
    6. 2.6 LNA and AFE Enable/Disable
    7. 2.7 Offset Cancellation And Log In- Cap Capacitor Value Selection
  8. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  9. 4Additional Information
    1. 4.1 Trademarks

3.2 PCB Layouts

LOG300DEVM, LOG300RGTEVM LOG300DEVM Top Layer Figure 3-3 LOG300DEVM Top Layer
LOG300DEVM, LOG300RGTEVM LOG300DEVM Layer 1 Figure 3-4 LOG300DEVM Layer 1
LOG300DEVM, LOG300RGTEVM LOG300DEVM Layer 2 Figure 3-5 LOG300DEVM Layer 2
LOG300DEVM, LOG300RGTEVM LOG300DEVM Bottom Layer Figure 3-6 LOG300DEVM Bottom Layer
LOG300DEVM, LOG300RGTEVM LOG300RGTEVM Top Layer Figure 3-7 LOG300RGTEVM Top Layer
LOG300DEVM, LOG300RGTEVM LOG300RGTEVM Layer 1 Figure 3-8 LOG300RGTEVM Layer 1
LOG300DEVM, LOG300RGTEVM LOG300RGTEVM Layer 2 Figure 3-9 LOG300RGTEVM Layer 2
LOG300DEVM, LOG300RGTEVM LOG300RGTEVM Bottom Layer Figure 3-10 LOG300RGTEVM Bottom Layer