SLPS597D April   2017  – June 2024 CSD88599Q5DC

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Power Block Performance
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Typical Power Block Device Characteristics
    7. 4.7 Typical Power Block MOSFET Characteristics
  6. 5Application and Implementation
    1. 5.1 Application Information
    2. 5.2 Brushless DC Motor With Trapezoidal Control
    3. 5.3 Power Loss Curves
    4. 5.4 Safe Operating Area (SOA) Curve
    5. 5.5 Normalized Power Loss Curves
    6. 5.6 Design Example – Regulate Current to Maintain Safe Operation
    7. 5.7 Design Example – Regulate Board and Case Temperature to Maintain Safe Operation
    8. 5.8 Layout
      1. 5.8.1 Layout Guidelines
        1. 5.8.1.1 Electrical Performance
        2. 5.8.1.2 Thermal Considerations
      2. 5.8.2 Layout Example
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Revision History
  9. 8Mechanical, Packaging, and Orderable Information

4.3 Power Block Performance

TJ = 25°C (unless otherwise noted)
PARAMETERCONDITIONSMINTYPMAXUNIT
PLOSSPower loss(1)VIN = 36V, VDD = 10V,
IOUT = 30A, ƒSW = 20kHz,
TJ = 25°C, duty cycle = 50%,
L = 480µH		3.0W
PLOSSPower lossVIN = 36V, VDD = 10V,
IOUT = 30A, ƒSW = 20kHz,
TJ = 125°C, duty cycle = 50%,
L = 480µH		3.4W
(1) Measurement made with eight 10µF 50V ±10% X5R (TDK C3225X5R1H106K250AB or equivalent) ceramic capacitors placed across VIN to PGND pins and using UCC27210DDAR 100V, 4A driver IC.