SLPU010
September 2022
JFE2140
Abstract
Trademarks
1
Overview
1.1
JFE2140 Overview
1.2
JFE2140EVM Overview
1.2.1
Kit Contents
1.3
Related Documentation
1.4
Evaluation Module Limitations
1.5
Electrostatic Discharge Caution
2
Getting Started
2.1
Power Supplies
2.2
Input
2.3
Output
2.4
Capacitors
3
Application Circuit
3.1
Ultra-Low-Noise Preamplifier
4
Schematic, PCB Layout, and Bill of Materials
4.1
Schematic
4.2
PCB Layout
4.3
Bill of Materials
4.2
PCB Layout
Figure 4-2
JFE2140EVM
PCB Layout
Figure 4-3
JFE2140EVM
Top Overlay
Figure 4-4
JFE2140EVM
Top Solder Mask
Figure 4-5
JFE2140EVM
Top Layer
Figure 4-6
JFE2140EVM
Signal Layer 1
Figure 4-7
JFE2140EVM
Signal Layer 2
Figure 4-8
JFE2140EVM
Bottom Layer
Figure 4-9
JFE2140EVM
Bottom Solder Mask
Figure 4-10
JFE2140EVM
Drill Drawing
Figure 4-11
JFE2140EVM
Board Dimensions