SLUA560D June 2011 – March 2022 UCC28950 , UCC28950-Q1 , UCC28951 , UCC28951-Q1
The FETs to drive the HBridge (QA..QD) need to selected based on maximum drain to source voltage (VdsQA_max) and peak drain to source current (IdsQA_max).
The FETs then need to be selected based on efficiency goals and FET power dissipation (PQA) and is a trial an error process. Equations 32 through 38 are used to estimate PQA based on FET data sheet parameters. To meet our efficiency goals, we selected a 20 A, 650 V, CoolMOS FETs from Infineon that had an estimated PQA of 2.1 W and would enable us to hit our efficiency goals.
In this design, to meet efficiency and voltage requirements 20 A, 650 V, CoolMOS FETs from Infineon were chosen for QA..QD.
FET drain to source on resistance:
FET Specified COSS:
Voltage across drain-to-source (VdsQA) where COSS was measured, data sheet parameter:
Calculate average Coss [2]:
QA FET gate charge:
Voltage applied to FET gate to activate FET:
Calculate QA losses (PQA) based on Rds(on)QA and gate charge (QAg):
Recalculate power budget: