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The following stacking configuration represents a battery pack protection system for up to 10-S cell pack. Figure 1-1 shows the configuration of the two devices. For configurations with less than 10-S cell pack, only use the two devices. For configurations with 11-S to 15-S cell packs, use three devices. For configurations with 16-S to 20-S cell packs, use four devices.
For configurations where one or more of the devices supports a lower cell count (for example, three or four) than the rest of the stacked devices, TI recommends using the uppermost device on the stack to support the highest cell count. For example, if the user wants to protect a 9-S cell pack, the top device would support five cells and the bottom device would support four cells. If the user wanted to protect a 17-S cell pack, the top device supports five cells and the lower devices each support four cells. When possible, configure each device to support the same number of cells.
The following instructions are useful when constructing any stacking configuration with the BQ77915. Many steps refer to the pin connections that can best be understood by observing the schematic. Further information on the setup of the Stacking Implementations is found in the bq77915 3-5S Low Power Protector with Cell Balancing and Hibernate Mode data sheet.
Sections Section 2.1 and Section 2.2 describe fault and recovery of the DSG and CHG FET controls. Each device in the stack is functional in protecting OV, UV, OTC, OTD, UTC and UTD faults.
The UV fault test focuses on the DSG turnoff time as cell 17 is monitored below the desired threshold. In Figure 2-1, it is clear that DSG falls and stays low while any cell has a UV fault detected. When all faults are removed the DSG rises, see Figure 2-2. When examining the delay of the DSG rise and fall by measuring the delta between the UV threshold and DSG rise and fall, both figures display a similar response time of close to 1s due to the large RGS. This is expected for the BQ77915 and needs to be accounted for appropriately in any system.
The OV fault test is almost identical to the UV fault test, but instead focuses on the CHG turnoff time as a cell is monitored above the desired threshold. As shown in Figure 2-3, the CHG pin falls due to the OV fault after a delay of approximately 500 ms. Recovery is shown in Figure 2-4.