SLUAAE4 May 2021 TPS563211
AECM is a new topology based on a fixed-frequency modulator with emulated current information for the loop control, combing the fixed frequency of PCM control and the fast load-transient response of the D-CAP2 control topology. The key features and benefits of AECM include:
Figure 2-1 shows the detailed control block diagram in the TPS563211 design.
To improve noise immunity with virtually no ripple on the output voltage, an additional RAMP is added. An included error amplifier makes the output voltage very accurate.
In the control block of the TPS563211 device, the inductor valley current is monitored by measuring the SW node voltage during low-side MOSFET ON-time, which leads a minimum off time requirement for the high-side MOSFET. When the ON timer is expired, the high-side MOSFET is turned off and the low-side MOSFET is turned on. The turning off of the high-side MOSFET causes the SW ringing. When measuring the SW node voltage, a time delay needs to be included to let the internal SW node ringing dissipate. This time delay results in the minimum off time for the high-side MOSFET.
Based on Equation 1, since Toff has a minimum value, it follows that the duty cycle, D, has a maximum value. If the FSW is fixed, a smaller TOFF(min), means a larger duty cycle can be supported. Alternatively, if the TOFF(min) is fixed, a larger duty cycle can be supported with a smaller FSW.
In the TPS563211 device, the minimum off time of low-side MOSFET is 105 ns and the maximum on time is 6 μs which result in a maximum duty cycle of about 98% during normal operation.