SLUAAH0 February   2022 UCC14130-Q1 , UCC14131-Q1 , UCC14140-Q1 , UCC14141-Q1 , UCC14240-Q1 , UCC14241-Q1 , UCC14340-Q1 , UCC14341-Q1 , UCC15240-Q1 , UCC15241-Q1

 

  1.   Trademarks
  2. Introduction
    1. 1.1 Pin Configuration and Functions
  3. Three-Phase Traction Inverter
  4. Gate Drive Bias Requirements
    1. 3.1 Gate Drive Bias Architectures
    2. 3.2 IGBT vs. SiC
    3. 3.3 Determining Required Bias Supply Power
    4. 3.4 Input Voltage Requirements
    5. 3.5 Output Voltage Requirements
  5. Single Positive Isolated Output Voltage
  6. Dual Positive and Negative Output Voltages
  7. Dual Positive Output Voltages
  8. Capacitor Selection
  9. RLIM Current Limit Resistor
    1. 8.1 RLIM Functional Description
    2. 8.2 RLIM Dual Output Configuration
      1. 8.2.1 CVEE Above Nominal Value CVDD Below Nominal Value
      2. 8.2.2 CVEE Below Nominal Value CVDD Above Nominal Value
      3. 8.2.3 Gate Driver Quiescent Current: IQ_VEE > IQ_VDD
      4. 8.2.4 Gate Driver Quiescent Current: IQ_VEE < IQ_VDD
      5. 8.2.5 CVEE Above Nominal Value CVDD Below Nominal Value: IQ_VEE > IQ_VDD
      6. 8.2.6 CVEE Below Nominal Value CVDD Above Nominal Value: IQ_VEE < IQ_VDD
    3. 8.3 RLIM Single Output Configuration
  10. UCC14240-Q1 Excel Design Calculator Tool
  11. 10Thermal Considerations
    1. 10.1 Thermal Resistance
    2. 10.2 Junction-to-Top Thermal Characterization Parameter
    3. 10.3 Thermal Measurement and TJ Calculation Example
  12. 11Enable (ENA) and Power Good (/PG)
  13. 12PCB Layout Considerations
  14. 13Reference Design Example
  15. 14Summary
  16. 15References

Thermal Resistance

The UCC14240-Q1 data sheet (section 6.4) specifies traditional thermal resistance parameters based on joint electron device engineering council (JEDEC) test standards used to derive RΘJA and RΘJC for a single die semiconductor package. The junction-to-ambient thermal resistance, RΘJA, is most often assumed valid for determining the junction temperature, TJ, as:

Equation 36. TJ=TA+RΘJA×PD

Where TA is the ambient temperature, RΘJA, is the junction-to-ambient thermal resistance found in the UCC14240-Q1 data sheet and PD is the power dissipation determined from the UCC14240-Q1 efficiency curves, also published in the data sheet. The problem with this approach is that RΘJA is determined based on the JEDEC PCB design standard for a given IC package. The derivation of RΘJA carries strong dependence upon chip size, pad size, environmental conditions and PCB design of copper pours, copper thickness, etc. The PCB used in a traction inverter, will most assuredly be nothing like the JEDEC PCB used to characterize RΘJA.

As a method for determining TJ based on measuring case temperature, TC, and knowing the total power dissipation, RΘJC, is commonly used as:

Equation 37. TJ=TC+RΘJC×PD

Using TC to determine TJ is valid when it can be assumed that the dissipated power converts heat to energy that is mostly radiated off the top surface of a plastic IC package. The TJ measurement technique is useful for legacy or military metallic packages or packages with metal top side cooling. However, inaccuracies are unavoidable when applying RΘJC to plastic packages. The UCC14240-Q1 is designed to extract heat through the package lead frame to the PCB introducing further discrepancies to the assumption that heat energy generated from inside the package is accurately represented by measuring the top side surface temperature, TC.