SLUAAR8 December 2023 TPS56837

2 Calculation of DCM Output Voltage Ripple in D-CAP Buck Converter

However, method of CCM output voltage ripple calculation is not designed for DCM operation. So it is necessary to know behavior in DCM operation first.

DCM operation is widely used in ECO-mode buck converters, which is an operation mode for having high efficiency in light loading operation. When inductor current decreases to 0A, high-side FET and low-side FET will be OFF. The converter will enter working period called Idle time, when No FET will be conducted during Idle time and output voltage keeps decreasing. This is quite different with CCM operation in buck converter. For D-CAP converter, when Vout drops to the level that V_FB-V_REF=0, internal on-timer will work and make high side MOSFET conduct for constant on-time, starting the next switch cycle. D-CAP2 and D-CAP3 control works similarly with D-CAP but equipped with internal ripple injection network, making converters easy to be used. For more details about D-CAP control mode, please refer to following application note: D-CAP Mode With All-Ceramic Output Capacitor Application.

Due to the existence of Idle time, there can be period that inductor current becomes zero, meaning the formula used for calculating output voltage ripple in DCM operation can be different with that in CCM operation. The following part will introduce method for calculating output voltage ripple in DCM operation.

When mainly considering the effects of output capacitors, the key item for calculating output voltage ripple in DCM operation is the same with CCM operation: finding charged electric in output capacitors.

A typical DCM operation is used as analyzed case, whose inductor operation illustration is shown in Figure 4-2. And during following analysis, only capacitive output voltage ripple is taken into consideration.

Figure 2-1 Inductor Current Illustration for DCM Operation

One critical item can be highlighted before analysis is time period for one pulse, or called switching period, which represents period that high-side FET on time plus low-side FET on time (ignoring deadtime in rising and falling edge). For D-CAP control, on time for high-side FET is fixed with rising and falling slew rate of inductor current once Vin and Vout are fixed, meaning the inductor peak current and on time for low-side FET is fixed whatever in DCM operation or CCM operation. So time period for one pulse is fixed both in CCM and DCM operation, which will be represented by in following description.

In Figure 4-2, brown line represents loading current ILoad. For the period when inductor current exceeding ILoad, excessive charge ΔQ will pour into output capacitors, leading to output voltage ripple.

ΔQ is the integration of time and inductor current when inductor current exceeds ILoad, which is the area of marked green shadowed triangle in Figure 4-2. The height and width of bottom edge in green shadowed triangle can be achieved in order to acquire the value of its area, which is ΔQ. The height is easily to be achieved by following equation: Height = IL_PEAK – ILoad, while IL_PEAK is the peak value of inductor current. In DCM operation, since inductor increases from 0 to its peak value, so IL_PEAK equals to ΔIL in DCM operation.Equation 3 is used to get ΔQ.

Equation 3.

∆ Q = 0.5 \times (∆ I L - I L o a d) \times T 3

The bottom edge of triangle is time period marked with T3. For D-CAP control, when Vin and Vout are fixed, on-time of high-side FET and on-time of low-side FET are fixed, whatever CCM or DCM operation. So the sum of T1, T2 and T3 equals to the switching period of normal CCM operation. Rising slew rate and falling slew rate of inductor current are fixed as well, meaning T1 can be achieved with dividing inductor rising slew rate by ILoad as shown in Equation 4. T2 can be calculated using same method with T1 calculation, which is illustrated in Equation 5. After getting T1 and T2, Equation 6 can be used to achieve T3.

Equation 4.

T 1 = \frac{I L o a d}{S R_r i s i n g} = \frac{I L o a d \times L}{V_{I N} - V_{O U T}}

Equation 5.

T 2 = \frac{I L o a d}{S R_f a l l i n g} = \frac{I L o a d \times L}{V_{O U T}}

Equation 6.

T 3 = T_{S W} - T 1 - T 2 = T_{S W} - \frac{I L o a d \times L \times V_{I N}}{V_{O U T} \times (V_{I N} - V_{O U T})} = \frac{1}{F_{S W}} - \frac{I L o a d \times L \times V_{I N}}{V_{O U T} \times (V_{I N} - V_{O U T})}

So ΔQ can be calculated by using Equation 7:

Equation 7.

∆ Q = 0.5 \times (\frac{V_{O U T} \times (1 - D)}{L \times F_{S W}} - I L o a d) \times (\frac{1}{F_{S W}} - \frac{I L o a d \times L \times V_{I N}}{V_{O U T} \times (V_{I N} - V_{O U T})})

Where D is duty cycle of buck converter, F_SW is switching frequency in CCM operation.

Once getting value of ΔQ, the output voltage ripple ΔV_OUT can be calculated by Equation 8:

Equation 8.

∆ V_{O U T} = \frac{∆ Q}{C_{O U T}} = \frac{0.5}{C_{O U T}} \times (\frac{V_{O U T} \times (1 - D)}{L \times F_{S W}} - I L o a d) \times (\frac{1}{F_{S W}} - \frac{I L o a d \times L \times V_{I N}}{V_{O U T} \times (V_{I N} - V_{O U T})})

Please be aware that above analysis only consider capacitive ripple. If ESR is also included in calculation of output voltage ripple, Equation 9 can be implemented:

Equation 9.

∆ V_{O U T} = \frac{0.5}{C_{O U T}} \times (\frac{V_{O U T} \times (1 - D)}{L \times F_{S W}} - I L o a d) \times (\frac{1}{F_{S W}} - \frac{I L o a d \times L \times V_{I N}}{V_{O U T} \times (V_{I N} - V_{O U T})}) + E S R \times (\frac{V_{O U T} \times (1 - D)}{L \times F_{S W}} - I L o a d)

It can be emphasized that effective value of C_OUT needs to be used in calculation, meaning DC bias effect is needed to be considered. Above method for calculating ΔV_OUT in DCM operation is designed not only for D-CAP parts, but also for D-CAP2 and D-CAP3 parts.