The key to a successful layout is understanding the circuit by identifying these critical components:

• High di/dt paths
• High dv/dt nodes
• Sensitive traces

Figure 2-3 shows the high di/dt paths in the BQ25710 application diagram. The most dominant high di/dt loops are the input switching current loop and output switching current loop. The input loop consists of an input capacitor and MOSFETs (Q1 and Q2), The output loop consists of an output capacitor and MOSFETs (Q3 and Q4), along with return paths.

Figure 2-3 BQ25710 Application Diagram Identifying High di/dt Loops, High dv/dt Nodes and Sensitive Traces

The high dv/dt nodes are those with fast voltage transitions. These nodes are the switch nodes (SW1 and SW2), the bootstrap nodes (BTST1 and BTST2), and the gate-drive traces (HIDRV1, LODRV1, HIDRV2 and LODRV2). The areas of the switching nodes need to be as large as possible yet as small as possible for electrical noise reasons. If the SW1 and SW2 are poured with too big area copper planes, the high dv/dt noisy signal can couple into other traces nearby through capacitive coupling, which can cause EMI issues.

The current-sense traces from R­_AC, R_SR to the IC pins (ACP, ACN, SRP and SRN) and the compensation components (COMP1 and COMP2) form the noise-sensitive traces. For good layout performance, optimize the surface areas of high dv/dt nodes, and keep the noise-sensitive traces away from the noisy (high di/dt and dv/dt) portions of the circuit and minimize the loop areas.