SLUAAX7 August 2024 BQ25758
With PFM disabled to lower the voltage regulation point at no load, the converter's voltage regulation accuracy over temperature at the VO_SNS pin is ±2%, regardless of system load current. If RCABLE = 0.250Ω connects VO_SNS to the system load and no cable compensation is provided, the voltage at VSYS_LOAD can be VOUT_REG ±2% - 0.250mV/A of system load.
The cable compensation circuit intends to correct for this reduction in voltage at the system load. Measured results with the cable compensation circuit, RCABLE = 0.250Ω, RIOUT = 6.19kΩ, RC1 = 10kΩ and from Equation 7, RC2 =10.1kΩ are shown in Table 3-1.
| VOUT_REG (V) | ISYS_LOAD (A) | VSYS_LOAD (V) |
|---|---|---|
| 5 | 0 | 5.007 |
| 5 | 1 | 5.035 |
| 5 | 3 | 5.063 |
| 9 | 0 | 9.025 |
| 9 | 1 | 9.042 |
| 9 | 3 | 9.066 |
| 12 | 0 | 12.018 |
| 12 | 1 | 12.037 |
| 12 | 3 | 12.063 |
| 15 | 0 | 15.023 |
| 15 | 1 | 15.046 |
| 15 | 3 | 15.072 |
| 15 | 5 | 15.090 |
| 20 | 0 | 20.057 |
| 20 | 1 | 20.077 |
| 20 | 3 | 20.095 |
| 20 | 5 | 20.105 |
With V(IOUT) having K ±4% and VREF ± 0.5% variation in the computation and ignoring the effects of ±0.5% or better resistors, the worst case dc regulation accuracy over temperature is ± (4%+0.5%+2%) = 6.5% with an average +14mV/A rising slope, a 20X improvement over the -250mV/A for a 0.250Ω cable.