SLUP409B April   2022  – April 2024 TPS543320 , TPS543620 , TPS543820 , TPS62913 , TPS62916

 

  1.   1
  2.   Abstract
  3. 1 Introduction
  4. 2 DC/DC Converters are Noisy
  5. 3 Power-Supply Output Voltage Ripple and Noise Degrade ADC Performance
  6. 4 Minimizing Low-Frequency Noise Requires Dedicated Low-Noise IC Technologies
  7. 5 Traditional Approaches to Reducing Ripple
  8. 6 Using Smaller Capacitors in Parallel
  9. 7 Larger Inductance
  10. 8 Adding a Feedthrough Capacitor
  11. 9 Adding a Ferrite Bead
  12. 10Layout Techniques
  13. 11Silicon Solutions
  14. 12Conclusions

1 Introduction

This document reviews three specific challenges that designers encounter when designing a power supply for a high-speed analog-to-digital converter (ADC) and approaches to solve them.