SLUS495J August   2001  – December 2023 UCC29002 , UCC39002

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
    1.     Pin Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Differential Current-Sense Amplifier (CS+, CS−, CSO)
      2. 6.3.2 Load-Share Bus Driver Amplifier (CSO, LS)
      3. 6.3.3 Load-Share Bus Receiver Amplifier (LS)
      4. 6.3.4 Error Amplifier (EAO)
      5. 6.3.5 Adjust Amplifier Output (ADJ)
      6. 6.3.6 Enable Function (CS+, CS−)
      7. 6.3.7 Fault Protection on LS Bus
      8. 6.3.8 Start-Up and Adjust Logic
      9. 6.3.9 Bias Input and Bias_OK Circuit (VDD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Start-Up Mode
      2. 6.4.2 Normal Running Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Disabled Mode
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Paralleling the Power Modules
    3. 7.3 Typical Application
      1. 7.3.1 Measuring the Voltage Loop of a Power Module
      2. 7.3.2 Detailed Design Procedure
        1. 7.3.2.1 The Shunt Resistor
        2. 7.3.2.2 The CSA Gain
        3. 7.3.2.3 Determining RADJ
        4. 7.3.2.4 Error Amplifier Compensation
      3. 7.3.3 Application Curve
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
      1. 8.1.1 Documentation Support
    2. 8.2 Related Links
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Revision History
  11.   Mechanical, Packaging, and Orderable Information

7.3.2.3 Determining RADJ

The ADJ pin of the load-share controller is connected to the positive remote-sense terminal (SENSE+, SNS+, S+) of the power supply module. In cases where the remote-sense function of a module is not used, an internal low-value resistor, herein designated as RSENSE, connects the module's internal feedback divider network to its output voltage rail to maintain regulation. A controlled current pulled through RSENSE by the ADJ pin can adjust the output voltage of the module slightly higher to overcome unbalanced distribution impedances and offsets that degrade current-sharing between multiple power modules operating in parallel. Since no current can flow out of the ADJ pin, the output voltage of a module cannot be decreased below its normal set-point.

In cases where the RSENSE value is relatively high, the maximum ADJ current IADJ(max) may increase the module's VOUT too much. In such cases, an external adjustment resistor RADJ is connected between the ADJ pin and the VOUT rail after RSHUNT. This arrangement places RADJ effectively in parallel with RSENSE and an artificial SENSE+ voltage is created by the voltage drop across RADJ∥RSHUNT due to the current sunk by the internal NPN transistor at the ADJ pin. RADJ scales the portion of IADJ that can flow through RSENSE to limit the maximum amount of voltage adjustment ΔVADJ(max) allowable for the module. There are two operating requirements that determine the minimum value of RADJ.

The voltage at the ADJ pin must be maintained at least 1V above the voltage at the EAO pin which is necessary to keep the transistor at the output of the internal adjust amplifier from saturating. To fulfill this requirement, use Equation 6 to calculate the RADJ value.

Equation 6. R A D J = ∆ V A D J ( m a x ) - I O U T ( m a x ) × R S H U N T V O U T - ∆ V A D J ( m a x ) - 1   V 500   Ω - ∆ V A D J ( m a x ) R S E N S E

where (referring to Figure 7-1)

  • RSHUNT is the external current-sense resistor.
  • RSENSE is the internal remote-sense resistance between V+ (same as VOUT) and S+ within the power module.

The total current into the ADJ pin must also be considered. The maximum sink current for ADJ, IADJ(max), is 6mA as determined by the internal 500Ω emitter resistor and the 3V clamp. The value of adjust resistor, RADJ, is based upon the maximum adjustment range of the module, ΔVADJmax. Use Equation 7 to calculate the value of the adjust resistor.

Equation 7. R A D J ≥ Δ V A D J ( m a x ) - I O U T ( m a x ) × R S H U N T I A D J ( m a x ) - ∆ V A D J ( m a x ) R S E N S E

By selecting a resistor value that meets both of these requirements, the ADJ pin is at least 1V greater than the EAO voltage and the ADJ pin sink current should not exceed the 6mA maximum. Equation 6 tends to dominate the requirements when the power module output voltage is relatively low (close to the UCC29002 start-up threshold VVDD(on)), whereas Equation 7 tends to dominate the requirements when VOUT is relatively high.