SLUS495J
August 2001 – December 2023
UCC29002
,
UCC39002
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
Pin Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Differential Current-Sense Amplifier (CS+, CS−, CSO)
6.3.2
Load-Share Bus Driver Amplifier (CSO, LS)
6.3.3
Load-Share Bus Receiver Amplifier (LS)
6.3.4
Error Amplifier (EAO)
6.3.5
Adjust Amplifier Output (ADJ)
6.3.6
Enable Function (CS+, CS−)
6.3.7
Fault Protection on LS Bus
6.3.8
Start-Up and Adjust Logic
6.3.9
Bias Input and Bias_OK Circuit (VDD)
6.4
Device Functional Modes
6.4.1
Start-Up Mode
6.4.2
Normal Running Mode
6.4.3
Fault Mode
6.4.4
Disabled Mode
7
Application and Implementation
7.1
Application Information
7.2
Paralleling the Power Modules
7.3
Typical Application
7.3.1
Measuring the Voltage Loop of a Power Module
7.3.2
Detailed Design Procedure
7.3.2.1
The Shunt Resistor
7.3.2.2
The CSA Gain
7.3.2.3
Determining RADJ
7.3.2.4
Error Amplifier Compensation
7.3.3
Application Curve
7.4
Power Supply Recommendations
7.5
Layout
7.5.1
Layout Guidelines
7.5.2
Layout Example
8
Device and Documentation Support
8.1
Receiving Notification of Documentation Updates
8.1.1
Documentation Support
8.2
Related Links
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
Mechanical, Packaging, and Orderable Information
6.2
Functional Block Diagram