SLUS495J August   2001  – December 2023 UCC29002 , UCC39002

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
    1.     Pin Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Differential Current-Sense Amplifier (CS+, CS−, CSO)
      2. 6.3.2 Load-Share Bus Driver Amplifier (CSO, LS)
      3. 6.3.3 Load-Share Bus Receiver Amplifier (LS)
      4. 6.3.4 Error Amplifier (EAO)
      5. 6.3.5 Adjust Amplifier Output (ADJ)
      6. 6.3.6 Enable Function (CS+, CS−)
      7. 6.3.7 Fault Protection on LS Bus
      8. 6.3.8 Start-Up and Adjust Logic
      9. 6.3.9 Bias Input and Bias_OK Circuit (VDD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Start-Up Mode
      2. 6.4.2 Normal Running Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Disabled Mode
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Paralleling the Power Modules
    3. 7.3 Typical Application
      1. 7.3.1 Measuring the Voltage Loop of a Power Module
      2. 7.3.2 Detailed Design Procedure
        1. 7.3.2.1 The Shunt Resistor
        2. 7.3.2.2 The CSA Gain
        3. 7.3.2.3 Determining RADJ
        4. 7.3.2.4 Error Amplifier Compensation
      3. 7.3.3 Application Curve
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
      1. 8.1.1 Documentation Support
    2. 8.2 Related Links
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Revision History
  11.   Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

0 °C < TA < 70 °C for UCC39002, –40 °C < TA < 105 °C for UCC29002 and UCC29002-1, TJ = TA, VVDD = 12V (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
GENERAL
IVDDqSupply current, idle stateLS = floating (open pin), VADJ = 5V2.53.5mA
VDD clamp voltageIVDD = 6mA13.514.2515V
UNDERVOLTAGE LOCKOUT (UVLO)
VVDD(on)Start-up voltage threshold(1)VDD rising4.1754.3754.575V
Hysteresis to UVLOVDD falling0.20.3750.55
CURRENT-SENSE AMPLIFIER
VIO_CSInput offset voltageTA = 25 °C, VIC = 0.5V or 11.5V, VCSO = 5 V−100100µV
Variation over operating temperature range±10µV/°C
IBIAS Input bias current (CS+, CS−) −0.6 0.6 µA
AVVoltage gain, DC7590dB
CMRRCommon-mode rejection ratio7590dB
GBW Gain-bandwidth product(2) 2 MHz
VOH_CSHigh-level output voltage (CSO)0.1V ≤ ([CS+] − [CS−]) ≤ 0.4V, IOUT_CSO = 0mA10.71111.8V
VOL_CSLow-level output voltage (CSO)−0.4V ≤ ([CS+] − [CS−]) ≤ −0.1V, IOUT_CSO = 0mA00.10.15V
IOH_CSHigh-level output current (CSO)VCSO = 10V−1−1.5mA
IOL_CSLow-level output current (CSO)VCSO = 1V11.5mA
LOAD-SHARE DRIVER (LS)
VRANGEInput voltage range010V
VLSOutput voltageVCSO = 1V0.99511.005V
VCSO = 10V9.951010.05
VOL_LSLow-level output voltageVCSO = 0V, IOUT_LS = 0mA00.10.15V
VOH_LSHigh-level output voltage(2)VVDD − 1.7V
IOUT_LSOutput current capability0.5V ≤ VLS ≤ 10V−1−1.5mA
ISC_LSShort-circuit currentVCSO = 10V, VLS = 0V −10−20mA
VSHTDNLS driver shutdown thresholdVCS− − VCS+0.30.50.7V
LOAD-SHARE BUS PROTECTION
IADJAdjust amplifier current, LS protection activeVCSO = 2V, VEAO = 2V, VADJ = 5V, VLS = VVDD0510µA
VCSO = 2V, VEAO = 2V, VADJ = 5V, VLS = 0V0510
ERROR AMPLIFIER
VOH_EAHigh-level output voltageIEAO = 0mA3.53.653.8V
gMTransconductance−50µA ≤ IEAO ≤ +50µA14mS
IOH_EAHigh-level output currentVLS − VCSO = 0.4V, REAO = 2.2kΩ0.70.851mA
ADJ BUFFER
VIO_ADJInput offset voltage(2)VEAO = 0V, VADJ = 1.5V–60mV
ISINKADJ zero-input leakage currentVEAO = 0V, VADJ = 5.0V0510µA
ISINKADJ sink currentVADJ = 5 V,
VEAO = 2 V,
LS = floating (open)		TA = 25 °C3.63.954.3mA
0 °C ≤ TA ≤ 70 °C3.453.954.45
−40 °C ≤ TA ≤ 105 °C(3)3.353.954.55
(1) Enables the load-share bus at start-up.
(2) Specified by design. Not production tested.
(3) This temperature range does not apply to UCC39002.