SLUS495J August   2001  – December 2023 UCC29002 , UCC39002

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
    1.     Pin Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Differential Current-Sense Amplifier (CS+, CS−, CSO)
      2. 6.3.2 Load-Share Bus Driver Amplifier (CSO, LS)
      3. 6.3.3 Load-Share Bus Receiver Amplifier (LS)
      4. 6.3.4 Error Amplifier (EAO)
      5. 6.3.5 Adjust Amplifier Output (ADJ)
      6. 6.3.6 Enable Function (CS+, CS−)
      7. 6.3.7 Fault Protection on LS Bus
      8. 6.3.8 Start-Up and Adjust Logic
      9. 6.3.9 Bias Input and Bias_OK Circuit (VDD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Start-Up Mode
      2. 6.4.2 Normal Running Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Disabled Mode
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Paralleling the Power Modules
    3. 7.3 Typical Application
      1. 7.3.1 Measuring the Voltage Loop of a Power Module
      2. 7.3.2 Detailed Design Procedure
        1. 7.3.2.1 The Shunt Resistor
        2. 7.3.2.2 The CSA Gain
        3. 7.3.2.3 Determining RADJ
        4. 7.3.2.4 Error Amplifier Compensation
      3. 7.3.3 Application Curve
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
      1. 8.1.1 Documentation Support
    2. 8.2 Related Links
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Revision History
  11.   Mechanical, Packaging, and Orderable Information

3 Description

The UCC29002 device family comprises advanced, high-performance, low-cost load-share controllers that provide all necessary functions to parallel multiple independent power supplies or DC-to-DC modules. Targeted for high-reliability applications in server, workstation, telecom, and other distributed power systems, the controller is suitable for N+1 redundant systems or high-current applications where off-the-shelf power supplies must be paralleled.

The BiCMOS UCC29002 is based on the automatic leader/follower architecture of predecessor UC3902 and UC3907 load-share controllers. The device is capable of better than 1% current-share error between modules at full load by using a very-low offset post-package-trimmed current-sense amplifier and a high-gain negative-feedback loop. With an amplifier common-mode range of 0V to the VDD supply rail, the current-sense resistor, RSHUNT, can be placed in either the GND return path or in the positive output rail of the power supply.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE (NOM)(2)
UCC29002
UCC29002-1(3)
UCC39002		SOIC (8)4.90mm × 6.00mm
UCC29002
UCC39002		VSSOP (8)3.00mm × 4.90mm
PDIP (8)9.81mm × 9.43mm
(1) For more information, see the Mechanical, Packaging, and Orderable Information section at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) UCC29002-1 uses "/1" suffix in the orderable part number.
GUID-1018ED58-291E-4C78-A169-8E9614FCF5CB-low.gif Typical Low-Side Current-Sensing Application