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  • TPS54231 2-A, 28-V Input, Step-Down DC-DC Converter With Eco-mode™

    • SLUS851D October   2008  – October 2014 TPS54231

      PRODUCTION DATA.  

  • CONTENTS
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  • TPS54231 2-A, 28-V Input, Step-Down DC-DC Converter With Eco-mode™
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency PWM Control
      2. 8.3.2  Voltage Reference (Vref)
      3. 8.3.3  Bootstrap Voltage (BOOT)
      4. 8.3.4  Enable and Adjustable Input Undervoltage Lockout (VIN UVLO)
      5. 8.3.5  Programmable Slow Start Using SS Pin
      6. 8.3.6  Error Amplifier
      7. 8.3.7  Slope Compensation
      8. 8.3.8  Current-Mode Compensation Design
      9. 8.3.9  Overcurrent Protection and Frequency Shift
      10. 8.3.10 Overvoltage Transient Protection
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Eco-mode™
      2. 8.4.2 Operation With VIN < 3.5 V
      3. 8.4.3 Operation With EN Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Switching Frequency
        2. 9.2.2.2 Output Voltage Set Point
        3. 9.2.2.3 Input Capacitors
        4. 9.2.2.4 Output Filter Components
          1. 9.2.2.4.1 Inductor Selection
          2. 9.2.2.4.2 Capacitor Selection
        5. 9.2.2.5 Compensation Components
        6. 9.2.2.6 Bootstrap Capacitor
        7. 9.2.2.7 Catch Diode
        8. 9.2.2.8 Output Voltage Limitations
        9. 9.2.2.9 Power Dissipation Estimate
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Estimated Circuit Area
    4. 11.4 Electromagnetic Interference (EMI) Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE
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DATA SHEET

TPS54231 2-A, 28-V Input, Step-Down DC-DC Converter With Eco-mode™

1 Features

  • 3.5- to 28-V Input Voltage Range
  • Adjustable Output Voltage Down to 0.8 V
  • Integrated 80-mΩ High-Side MOSFET Supports up to 2 A Continuous Output Current
  • High Efficiency at Light Loads with a Pulse Skipping Eco-mode™
  • Fixed 570-kHz Switching Frequency
  • Typical 1-μA Shutdown Quiescent Current
  • Adjustable Slow-Start Limits Inrush Currents
  • Programmable UVLO Threshold
  • Overvoltage Transient Protection
  • Cycle-by-Cycle Current Limit, Frequency Fold Back and Thermal Shutdown Protection
  • Available in Easy-to-Use SOIC8 Package
  • Supported by WEBENCH® Software Tool (www.TI.com/WEBENCH)

2 Applications

  • Consumer Applications such as Set-Top Boxes, CPE Equipment, LCD Displays, Peripherals, and Battery Chargers
  • Industrial and Car Audio Power Supplies
  • 5-V, 12-V and 24-V Distributed Power Systems

3 Description

The TPS54231 device is a 2-V, 2-A non-synchronous buck converter that integrates a low RDS(on) high-side MOSFET. To increase efficiency at light loads, a pulse skipping Eco-mode™ feature is automatically activated. Furthermore, the 1-μA shutdown supply current allows the device to be used in battery powered applications. Current mode control with internal slope compensation simplifies the external compensation calculations and reduces component count while allowing the use of ceramic output capacitors. A resistor divider programs the hysteresis of the input undervoltage lockout. An overvoltage transient protection circuit limits voltage overshoots during startup and transient conditions. A cycle-by-cycle current limit scheme, frequency fold back and thermal shutdown protect the device and the load in the event of an overload condition. The TPS54231 device is available in an 8-pin SOIC package that has been internally optimized to improve thermal performance.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS54231 SOIC (8) 4.90 mm × 3.90 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

4 Simplified Schematic

app_sch_lus851.gif

Efficiency

eff_il_lvs839.gif

5 Revision History

Changes from C Revision (July 2012) to D Revision

  • Added Handling Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. Go

Changes from B Revision (February 2012) to C Revision

  • Added 5.3 to the MAX column of the ELEC CHAR table, section CURRENT LIMITGo
  • Deleted Maximum Power Dissipation versus Junction Temperature graphGo

Changes from A Revision (March 2010) to B Revision

  • Deleted Features Item: For SWIFT™ Documentation, See the TI Website at http://www.ti.com/swiftGo

Changes from * Revision (October 2008) to A Revision

  • Changed the ABSOLUTE MAXIMUM RATINGS table, Input Voltage - EN pin max value From: 5V to 6VGo
  • Added a new table to the Description - For additional design needsGo
  • Changed Equation 9 for calculating ILPPGo
  • Added new Equation 10 for calculating IL(RMS)Go
  • Changed Equation 11 for calculating IL(PK)Go
  • Changed Equation 14 for calculating IOUT(RMS)Go
  • Changed Equation 16 for calculating FPOGo
  • Changed Equation 25 for calculating RZGo
  • Changed Equation 28 for calculating RZGo
  • Changed Equation 29 and Equation 30 for calculating CZ and CP, respectively.Go

6 Pin Configuration and Functions

D Package
8-Pin SOIC
Top View
po2_lvs839.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 BOOT O A 0.1-μF bootstrap capacitor is required between the BOOT and PH pins. If the voltage on this capacitor falls below the minimum requirement, the high-side MOSFET is forced to switch off until the capacitor is refreshed.
2 VIN I This pin is the 3.5- to 28-V input supply voltage.
3 EN I This pin is the enable pin. To disable, pull below 1.25 V. Float this pin to enable. Programming the input undervoltage lockout with two resistors is recommended.
4 SS I This pin is slow-start pin. An external capacitor connected to this pin sets the output rise time.
5 VSENSE I This pin is the inverting node of the transconductance (gm) error amplifier.
6 COMP O This pin is the error-amplifier output and input to the PWM comparator. Connect frequency compensation components to this pin.
7 GND — Ground pin
8 PH O The PH pin is the source of the internal high-side power MOSFET.

7 Specifications

7.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Input voltage VIN –0.3 30 V
EN –0.3 6
BOOT 38
VSENSE –0.3 3
COMP –0.3 3
SS –0.3 3
Output voltage BOOT-PH 8 V
PH –0.6 30
PH (10 ns transient from ground to negative peak) –5
Source current EN 100 μA
BOOT 100 mA
VSENSE 10 μA
PH 6 A
Sink current VIN 6 A
COMP 100 μA
SS 200
Operating junction temperature, TJ –40 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) –2 2 kV
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) –500 500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Operating Input Voltage on (VIN pin) 3.5 28 V
TJ Operating junction temperature –40 150 °C

7.4 Thermal Information

THERMAL METRIC(1) D UNIT
8 PINS
RθJA Junction-to-ambient thermal resistance 116.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 53.7
RθJB Junction-to-board thermal resistance 57.1
ψJT Junction-to-top characterization parameter 12.9
ψJB Junction-to-board characterization parameter 56.5
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

TJ = –40°C to 150°C, VIN = 3.5 to 28 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN PIN)
Internal undervoltage lockout threshold Rising and falling 3.5 V
Shutdown supply current EN = 0V, VIN = 12V, –40°C to 85°C 1 4 μA
Operating – non switching supply current VSENSE = 0.85 V 75 110 μA
ENABLE AND UVLO (EN PIN)
Enable threshold Rising and falling 1.25 1.35 V
Input current Enable threshold – 50 mV -1 μA
Input current Enable threshold + 50 mV -4 μA
VOLTAGE REFERENCE
Voltage reference 0.772 0.8 0.828 V
HIGH-SIDE MOSFET
On resistance BOOT-PH = 3 V, VIN = 3.5 V 115 200 mΩ
BOOT-PH = 6 V, VIN = 12 V 80 150
ERROR AMPLIFIER
Error amplifier transconductance (gm) –2 μA < I(COMP) < 2 μA, V(COMP) = 1 V 92 μmhos
Error amplifier DC gain(1) VSENSE = 0.8 V 800 V/V
Error amplifier unity gain bandwidth(1) 5 pF capacitance from COMP to GND pins 2.7 MHz
Error amplifier source/sink current V(COMP) = 1 V, 100-mV overdrive ±7 μA
Switch current to COMP transconductance VIN = 12 V 9 A/V
PULSE SKIPPING ECO-MODE
Pulse skipping Eco-mode™ switch current threshold 100 mA
CURRENT LIMIT
Current limit threshold VIN = 12 V 2.3 3.5 5.3 A
THERMAL SHUTDOWN
Thermal Shutdown 165 °C
SLOW START (SS PIN)
Charge current V(SS) = 0.4 V 2 μA
SS to VSENSE matching V(SS) = 0.4 V 10 mV
(1) Specified by design.

7.6 Switching Characteristics

TJ = –40°C to 150°C, VIN = 3.5 to 28 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SWITCHING FREQUENCY
TPS54231 device switching frequency VIN = 12 V 400 570 740 kHz
Minimum controllable on time VIN = 12 V, 25°C 105 130 ns
Maximum controllable duty ratio(1) BOOT-PH = 6 V 90% 93%
(1) Specified by design.

7.7 Typical Characteristics

rdson_tj_lus851.gif
Figure 1. ON Resistance vs Junction Temperature
fsw_tj_lus851.gif
Figure 3. Switching Frequency vs Junction Temperature
min_cont_tj_lus851.gif
Figure 5. Minimum Controllable ON Time vs Junction Temperature
iss_tj_lus851.gif
Figure 7. SS Charge Current vs Junction Temperature
isd_vi_lus851.gif
Figure 2. Shutdown Quiescent Current vs Input Voltage
vref_tj_lus851.gif
Figure 4. Voltage Reference vs Junction Temperature
min_duty_tj_lus851.gif
Figure 6. Minimum Controllable Duty Ratio vs Junction Temperature
cur_vi_lus851.gif
Figure 8. Current-Limit Threshold vs Input Voltage

 
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