SLUSBA1H October   2012  – August 2015 BQ24250 , BQ24251 , BQ24253

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Options
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Charge Profile
      2. 9.3.2  EN1 and EN2 Pins
      3. 9.3.3  External Settings: ISET, ILIM and VIN_DPM
      4. 9.3.4  BC1.2 D+/D- Detection
      5. 9.3.5  Transient Response
      6. 9.3.6  AnyBoot Battery Detection
      7. 9.3.7  Input Voltage Based DPM
      8. 9.3.8  Sleep Mode
      9. 9.3.9  Input Over-Voltage Protection
      10. 9.3.10 NTC Monitor
      11. 9.3.11 Production Test Mode
      12. 9.3.12 Safety Timer
      13. 9.3.13 Watchdog Timer
      14. 9.3.14 Fault Modes
      15. 9.3.15 Dynamic Power Path Management
    4. 9.4 Device Functional Modes
      1. 9.4.1 I2C Operation (Host Mode / Default Mode)
    5. 9.5 Programming
      1. 9.5.1 Serial Interface Description
        1. 9.5.1.1 F/S Mode Protocol
    6. 9.6 Register Maps
      1. 9.6.1 Register #1
      2. 9.6.2 Register #2
      3. 9.6.3 Register #3
      4. 9.6.4 Register #4
      5. 9.6.5 Register #5
      6. 9.6.6 Register #6
      7. 9.6.7 Register #7
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Inductor Selection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Summary

12 Layout

12.1 Layout Guidelines

  1. Place the BOOT, PMID, IN, BAT, and LDO capacitors as close as possible to the IC for optimal performance.
  2. Connect the inductor as close as possible to the SW pin, and the SYS/CSIN cap as close as possible to the inductor minimizing noise in the path.
  3. Place a 1-μF PMID capacitor as close as possible to the PMID and PGND pins, making the high frequency current loop area as small as possible.
  4. The local bypass capacitor from SYS/CSIN to GND must be connected between the SYS/CSIN pin and PGND of the IC. This minimizes the current path loop area from the SW pin through the LC filter and back to the PGND pin.
  5. Place all decoupling capacitors close to their respective IC pins and as close as possible to PGND (do not place components such that routing interrupts power-stage currents). All small control signals must be routed away from the high-current paths.
  6. To reduce noise coupling, use a ground plane if possible, to isolate the noisy traces from spreading its noise all over the board. Put vias inside the PGND pads for the IC.
  7. The high-current charge paths into IN, Micro-USB, BAT, SYS/CSIN, and from the SW pins must be sized appropriately for the maximum charge current to avoid voltage drops in these traces.
  8. For high-current applications, the balls for the power paths must be connected to as much copper in the board as possible. This allows better thermal performance because the board conducts heat away from the IC.

12.2 Layout Example

bq24250 bq24251 bq24253 pcb_layout_lusba1.gifFigure 34. Recommended bq2425x PCB Layout for DSBGA Package

12.3 Thermal Considerations

During the charging process, to prevent overheat of the chip, bq24250/1/3 monitors the junction temperature, TJ, of the die and begins to taper down the charge current once TJ reaches the thermal regulation threshold, TREG. The charge current is reduced when the junction temperature increases above TREG. Once the charge current is reduced, the system current is reduced while the battery supplements the load to supply the system. This may cause a thermal shutdown of the IC if the die temperature rises too. At any state, if TJ exceeds TSHTDWN, bq2425x suspends charging and disables the buck converter. During thermal shutdown mode, PWM is turned off, all safety timers are suspended, and a single 256μs pulse is sent on the STAT and INT outputs and the FAULT/STAT bits of the status registers are updated in the I2C. A new charging cycle begins when TJ falls below TSHTDWN by approximately 10°C.