The tracking and layout of the VSENSE pin and connecting components is critical to minimizing noise pick-up and interference in the magnetic sensing block. (See Figure 63 for suggested component placement and tracking). Reduce the total surface area of traces on the VSENSE net to a minimum.
Because the resistance values of RA and RB are relatively high to minimize power dissipation, the high impedance makes the VSENSE pin potentially noise-sensitive. To minimize noise pick-up, locate resistors RA and RB as close as possible to the VSENSE pin, with RB in particular placed as directly as possible between VSENSE and GND pins;
Depending on layout, a small noise filter capacitor may be useful on the VSENSE pin, such as C15 shown in Figure 44. Connect this capacitor as directly as possible between the VSENSE and GND pins. Choose the value of this capacitor as small as possible, and no greater than 10 pF. A larger value significantly delays the voltage rise-time at the pin, and affects the regulation set-point;
In case of possible board faults that can pull the VSENSE pin below GND (such as R7 shorted), in order to protect the pin and limit possible negative current out of the pin, a series resistor R4 (as shown in Figure 44) and clamping diode from GND are recommended. Maintain the value of R4 between 100 Ω and 500 Ω. A larger value may affect regulation and line sense accuracy.
For correct line sense operation, the switched pull-up R10 and D4 must be added. The value of R10 must be 3.9 kΩ to match the internal device gain. The switched pull-up diode and the GND clamping diode can be combined into a dual-diode common-cathode package, such as D4 as shown in Figure 44.