SLUSC25A February   2015  – August 2017 TPS2388

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2. 5.1 Detailed Pin Description
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Port Remapping
      2. 8.3.2 Port Power Priority
      3. 8.3.3 A/D Converter
      4. 8.3.4 I2C Watchdog
      5. 8.3.5 Foldback Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Port Operating Modes
        1. 8.4.1.1 Semiauto
        2. 8.4.1.2 Manual
        3. 8.4.1.3 Power Off
      2. 8.4.2 Detection
      3. 8.4.3 Classification
      4. 8.4.4 DC Disconnect
    5. 8.5 Programming
      1. 8.5.1 I2C Serial Interface
    6. 8.6 Register Maps
      1. 8.6.1  Complete Register Set
      2. 8.6.2  INTERRUPT Register
        1. Table 4. INTERRUPT Register Field Descriptions
      3. 8.6.3  INTERRUPT MASK Register
        1. Table 5. INTERRUPT MASK Register Field Descriptions
      4. 8.6.4  POWER EVENT Register
        1. Table 6. POWER EVENT Register Field Descriptions
      5. 8.6.5  DETECTION EVENT Register
        1. Table 7. DETECTION EVENT Register Field Descriptions
      6. 8.6.6  FAULT EVENT Register
        1. Table 8. FAULT EVENT Register Field Descriptions
      7. 8.6.7  START/ILIM EVENT Register
        1. Table 9. START/ILIM EVENT Register Field Descriptions
      8. 8.6.8  SUPPLY EVENT Register
        1. Table 10. SUPPLY EVENT Register Field Descriptions
      9. 8.6.9  PORT 1 STATUS Register
      10. 8.6.10 PORT 2 STATUS Register
      11. 8.6.11 PORT 3 STATUS Register
      12. 8.6.12 PORT 4 STATUS Register
        1. Table 11. PORT STATUS Register Field Descriptions
      13. 8.6.13 POWER STATUS Register
        1. Table 12. POWER STATUS Register Field Descriptions
      14. 8.6.14 Pin Status Register
        1. Table 13. Pin Status Register Field Descriptions
      15. 8.6.15 OPERATING MODE Register
        1. Table 14. OPERATING MODE Register Field Descriptions
      16. 8.6.16 DISCONNECT ENABLE Register
        1. Table 15. DISCONNECT ENABLE Register Field Descriptions
      17. 8.6.17 DETECT/CLASS ENABLE Register
        1. Table 16. DETECT/CLASS ENABLE Register Field Descriptions
      18. 8.6.18 Port Power Priority/ICUT Disable Register Name
        1. Table 17. Port Power Priority/ICUT Disable Register Field Descriptions
      19. 8.6.19 TIMING CONFIGURATION Register
        1. Table 18. TIMING CONFIGURATION Register Field Descriptions
      20. 8.6.20 GENERAL MASK Register
        1. Table 19. GENERAL MASK Register Field Descriptions
      21. 8.6.21 DETECT/CLASS RESTART Register
        1. Table 20. DETECT/CLASS RESTART Register Field Descriptions
      22. 8.6.22 POWER ENABLE Register
        1. Table 21. POWER ENABLE Register Field Descriptions
      23. 8.6.23 RESET Register
        1. Table 22. RESET Register Field Descriptions
      24. 8.6.24 ID Register
        1. Table 23. ID Register Field Descriptions
      25. 8.6.25 Police 21 Configuration Register
      26. 8.6.26 Police 43 Configuration Register
        1. Table 24. Police 43 Register Field Descriptions
      27. 8.6.27 IEEE Power Enable Register
        1. Table 25. IEEE Power Enable Register Field Descriptions
      28. 8.6.28 Power-on Fault Register
        1. Table 26. Power-on Fault Register Field Descriptions
      29. 8.6.29 PORT RE-MAPPING Register
        1. Table 27. PORT RE-MAPPING Register Field Descriptions
      30. 8.6.30 Port 21 Multi Bit Priority Register
      31. 8.6.31 Port 43 Multi Bit Priority Register
        1. Table 28. Port 43 Register Field Descriptions
      32. 8.6.32 TEMPERATURE Register
        1. Table 29. TEMPERATURE Register Field Descriptions
      33. 8.6.33 INPUT VOLTAGE Register
        1. Table 30. INPUT VOLTAGE Register Field Descriptions
      34. 8.6.34 PORT 1 CURRENT Register
      35. 8.6.35 PORT 2 CURRENT Register
      36. 8.6.36 PORT 3 CURRENT Register
      37. 8.6.37 PORT 4 CURRENT Register
        1. Table 31. PORT 4 CURRENT Register Field Descriptions
      38. 8.6.38 PORT 1 VOLTAGE Register
      39. 8.6.39 PORT 2 VOLTAGE Register
      40. 8.6.40 PORT 3 VOLTAGE Register
      41. 8.6.41 PORT 4 VOLTAGE Register
        1. Table 32. PORT 4 VOLTAGE Register Field Descriptions
      42. 8.6.42 PoE Plus Register
        1. Table 33. PoE Plus Register Field Descriptions
      43. 8.6.43 FIRMWARE REVISION
        1. Table 34. FIRMWARE REVISION Register Field Descriptions
      44. 8.6.44 I2C WATCHDOG Register
        1. Table 35. I2C WATCHDOG Register Field Descriptions
      45. 8.6.45 DEVICE ID Register
        1. Table 36. DEVICE ID Register Field Descriptions
      46. 8.6.46 PORT 1 DETECT RESISTANCE Register
      47. 8.6.47 PORT 2 DETECT RESISTANCE Register
      48. 8.6.48 PORT 3 DETECT RESISTANCE Register
      49. 8.6.49 PORT 4 DETECT RESISTANCE Register
        1. Table 37. PORT 4 DETECT RESISTANCE Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Introduction to PoE
      2. 9.1.2 TPS2388 Application
      3. 9.1.3 Kelvin Current Sensing Resistor
      4. 9.1.4 Connections on Unused Ports
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Pin Bypass Capacitors
        2. 9.2.2.2 Per Port Components
        3. 9.2.2.3 System Level Components (not shown in the schematic diagrams)
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 VDD
    2. 10.2 VPWR
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Port Current Kelvin Sensing
    2. 11.2 Layout Example
      1. 11.2.1 Component Placement and Routing Guidelines
        1. 11.2.1.1 Power Pin Bypass Capacitors
        2. 11.2.1.2 Per-Port Components
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

6.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
δIfault Duty cycle of Iport with current fault 5.5% 6.7%
tOVLD ICUT time limit (DCUTn = 0) TOVLD = 00 50 70 ms
TOVLD = 01 25 35
TOVLD = 10 100 140
TOVLD = 11 200 280
tICUT_INT ICUT Interrupt time limit when ICUT is disabled (DCUTn = 1)(1) ICUT limit exceeded but not ILIM, TLIM = 01, PoEPn = 1 tLIM/2 tLIM/2 + 6 ms
tLIM ILIM time limit 50 70 ms
TLIM = 00, PoEPn = 1 50 70
TLIM = 01, PoEPn = 1 14.5 15 15.75
TLIM = 10, PoEPn = 1 11.5 12 12.5
TLIM = 11, PoEPn = 1 9.5 10 10.5
tSTART Maximum current limit duration in port start-up TSTART = 00 50 70 ms
TSTART = 01 25 35
TSTART = 10 100 140
tDET Detection duration, 4-point discovery Time to complete a detection 275 350 425 ms
tDET_BOFF Detect backoff pause between discovery attempts VVPWR – VDRAINn > 2.5 V 300 400 500 ms
VVPWR – VDRAINn < 2.5 V 15 100
tDET_DLY Detection delay From command or PD attachment to port detection complete 590 ms
tCLE Classification duration, first and second class event Semiauto mode. From detection complete 6.5 12 ms
tpdc Classification duration, 1-event physical layer class timing Semiauto mode. From detection complete 6.5 12 ms
Manual mode. From beginning of class 6.5 14
tME Mark Duration, first and second mark event Semiauto mode. From Class 4 complete 6 12 ms
tpon Port Power-On delay, semiauto mode From end of detection to port turn on using IEEE power enable 200 ms
Port Power-On delay, manual mode From port turn on command to port turn on completed, four ports 4 ms
tRESET Reset time duration from RESET pin 1 5 µs
ted Error delay timing. Delay before next attempt to power a port following power removal due to error condition ICUT , ILIM or IInrush fault, semiauto mode 0.8 1 1.2 s
tMPDO PD maintain power signature dropout time limit TMPDO = 00 300 400 ms
TMPDO = 01 75 100
TMPDO = 10 150 200
TMPDO = 11 600 800
tMPS PD maintain power signature time for validity 13 15 17 ms
tD_off_OSS Gate turn off time from 1-bit OSS input From OSS to VGATEn < 1 V, VSENn = 0 V, MbitPrty = 0 1 5 µs
tOSS_OFF Gate turn off time from 3-bit OSS input From Start bit falling edge to VGATEn < 1 V, VSENn = 0 V, MbitPrty = 1 72 104 µs
tP_off_CMD Gate turn off time from port off command From port off command to VGATEn < 1 V, VSENn = 0 V 300 µs
tP_off_RST Gate turn off time with RESET From RESET low to VGATEn < 1 V, VSENn = 0 V 1 5 µs
tD_off_SEN Gate turn off time from SENn input VDRAINn = 1 V , From VSENn pulsed to 0.425 V 0.9 µs
Gate turn off time from SENn input (PoEPn = 1) VDRAINn = 1 V , From VSENn pulsed to 0.62 V 0.9
tPOR Device power-on reset delay 20 ms
(1) The tICUT_INT maximum value shown in the table only applies to a low percentage (< 10%) of occurence. The rest of the time, it becomes tLIM/2 + 2 ms.