SLUSCK4C September   2016  – October 2024 UCC28950-Q1 , UCC28951-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Dissipation Ratings
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Start-Up Protection Logic
      2. 6.3.2  Voltage Reference (VREF)
      3. 6.3.3  Error Amplifier (EA+, EA–, COMP)
      4. 6.3.4  Soft-Start and Enable (SS/EN)
      5. 6.3.5  Light-Load Power Saving Features
      6. 6.3.6  Adaptive Delay, (Delay Between OUTA and OUTB, OUTC and OUTD (DELAB, DELCD, ADEL))
      7. 6.3.7  Adaptive Delay (Delay Between OUTA and OUTF, OUTB and OUTE (DELEF, ADELEF)
      8. 6.3.8  Minimum Pulse (TMIN)
      9. 6.3.9  Burst Mode
      10. 6.3.10 Switching Frequency Setting
      11. 6.3.11 Slope Compensation (RSUM)
      12. 6.3.12 Dynamic SR ON/OFF Control (DCM Mode)
      13. 6.3.13 Current Sensing (CS)
      14. 6.3.14 Cycle-by-Cycle Current Limit Current Protection and Hiccup Mode
      15. 6.3.15 Synchronization (SYNC)
      16. 6.3.16 Outputs (OUTA, OUTB, OUTC, OUTD, OUTE, OUTF)
      17. 6.3.17 Supply Voltage (VDD)
      18. 6.3.18 Ground (GND)
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Power Loss Budget
        2. 7.2.2.2  Preliminary Transformer Calculations (T1)
        3. 7.2.2.3  QA, QB, QC, QD FET Selection
        4. 7.2.2.4  Selecting LS
        5. 7.2.2.5  Selecting Diodes DB and DC
        6. 7.2.2.6  Output Inductor Selection (LOUT)
        7. 7.2.2.7  Output Capacitance (COUT)
        8. 7.2.2.8  Select FETs QE and QF
        9. 7.2.2.9  Input Capacitance (CIN)
        10. 7.2.2.10 Current Sense Network (CT, RCS, R7, DA)
          1. 7.2.2.10.1 Voltage Loop Compensation Recommendation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Community Resources
    5. 8.5 Trademarks
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Soft-Start and Enable (SS/EN)

The soft-start pin (SS/EN) is a multi-function pin used for the following operations:

  • Closed-loop soft start with the gradual duty cycle increase from the minimum set by TMIN up to the steady-state duty cycle required by the regulated output voltage.
  • Setting hiccup mode conditions during cycle-by-cycle overcurrent limit.
  • On/off control for the converter.

During the soft-start sequence, one of the voltages at the SS/EN or EA+ pins, whichever is lower (SS/EN – 0.55 V) or EA+ voltage (see Section 6.2), sets the reference voltage for a closed feedback loop. Both SS/EN and EA+ signals are noninverting inputs of the error amplifier with the COMP pin being its output. Thus the soft-start time always goes under the closed feedback loop and the voltage at COMP pin sets the duty cycle. The duty cycle defined by the COMP pin voltage can not be shorter than TMIN pulse width set by the user. However, if the shortest duty cycle is set by the cycle-by-cycle current limit circuit, then it becomes dominant over the duty cycle defined by the COMP pin voltage or by the TMIN block.

The soft-start duration is defined by an external capacitor CSS, connected between the SS/EN pin and ground, and the internal charge current that has a typical value of 25 µA. Pulling the soft-start pin externally below 0.55 V shuts down the controller. The release of the soft-start pin enables the controller to start, and if there is no current limit condition, the duty cycle applied to the output inductor gradually increases until it reaches the steady-state duty cycle defined by the regulated output voltage of the converter. This increase happens when the voltage at the SS/EN pin reaches and then exceeds by 0.55 V, the voltage at the EA+ pin. Thus for the given soft-start time TSS, the CSS value can be defined by Equation 1 or Equation 2:

Equation 1. C S S ( l e a d e r ) = T S S × 25   µ A 0.55 + V ( E A + )
Equation 2. C S S ( f o l l o w e r ) = T S S × 25   µ A 825   k Ω × l n 20.6 20.6 - 0.55 - V ( E A + )

For example, in Equation 1, if the soft-start time TSS is 10 ms, and the EA+ pin is 2.5 V, then the soft-start capacitor CSS is equal to 82 nF.

Note:

If the converter is configured to operate in follower mode, connect a 825-kΩ (±5%) resistor from the SS pin to ground.