SLUSCM5A August   2017  – February 2018 UCC24612

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Flyback with High-Side SR
      2.      Flyback with Low-Side SR
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Management
      2. 7.3.2 Synchronous Rectifier Control
      3. 7.3.3 Adaptive Blanking Time
        1. 7.3.3.1 Turn-On Blanking Timer (Minimum On Time)
        2. 7.3.3.2 Turn-Off Blanking Timer
        3. 7.3.3.3 SR Turn-on Re-arm
      4. 7.3.4 Gate Voltage Clamping
      5. 7.3.5 Standby Mode
    4. 7.4 Device Functional Modes
      1. 7.4.1 UVLO Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Run Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 SR MOSFET Selection
        2. 8.2.2.2 Bypass Capacitor Selection
        3. 8.2.2.3 Snubber design
        4. 8.2.2.4 High-Side Operation
      3. 8.2.3 Application Curves
        1. 8.2.3.1 Steady State Testing Low-Side Configuration
        2. 8.2.3.2 Steady State Testing High-Side Configuration
  9. Power Supply Recommendations
  10. 10PCB Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Features

  • Supports Topologies such as Active Clamp Flyback, QR, DCM, CCM Flyback and LLC
  • MOSFET VDS Sensing up to 230 V
  • Operating Frequency Up to 1 MHz
    • 1 MHz for UCC24612-1
    • 800 kHz for UCC24612-2
  • Wide VDD Range Allows for Direct Bias from 5-V to 28-V Output Systems
  • 4-A Sink, 1-A Source Gate Driver with Proportional Gate Drive
  • Adaptive Minimum Off-time for Increased Noise Immunity
  • Cycle Limit Pre-Turn-off Improves Efficiency in CCM
  • High or Low-Side Configurable
  • Automatic Light-Load and Sleep-Mode Management with 320-µA standby current
  • 16-ns Typical Turnoff Propagation Delay
  • 9.5-V Gate Drive Clamp for Reduced Driving Loss